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ds96tel0200 1 1 p reliminary p roduct s pecification features n complete stand-alone line 21 decoder for closed- captions and extended data services (xds). n preprogrammed to provide full compliance with eia- 608 specifications for extended data services. n automatic extraction and serial output of special xds packets such as time of day, local time zone, and program rating ( v-chip ). n cost-effective solution for ntsc violence blocking inside picture-in-picture (pip) windows. n minimal communications and control overhead provides simple implementation of violence block, closed caption, and auto clock set features. n programmable, full screen on-screen display (osd) for creating osd or captions inside a picture-in- picture (pip) window (Z86129 only). n i 2 c serial data and control communication n user-programmable horizontal display position for easy osd centering and adjustment (Z86129 only). general description the Z86129/130/131 is a stand-alone integrated circuit, capable of processing vertical blanking interval (vbi) data from both fields of the video frame in data conforming to the transmission format defined in the television decoder circuits act of 1990 and in accordance with the electronics industry association specification 608 (eia-608). the line 21 data stream can consist of data from several data channels multiplexed together. field 1 has four data channels, two captions and two text. field 2 has five additional data channels, two captions, two text and extended data services (xds). xds data structure is defined in eia-608. the Z86129 can recover and display data transmitted on any of these nine data channels. the z86130 and z86131 are derivatives of the Z86129 which can recover xds data and output the recovered data via the serial port. the z86130 and z86131 do not have osd capability, but are ideally suited for line 21 data slicer applications. the Z86129/130/131 can recover and output to a host processor via the i 2 c serial bus any xds data packet defined in eia-608. on-chip xds filters are fully programmable, enabling recovery of only those xds data packets selected by the user, making the Z86129/130 an ideal choice for implementing ntsc violence block. the z86131 is designed especially for extracting xds time information for automatic clock-set features in tvs, vcrs, and set-top boxes. in addition, the Z86129/130 is ideally suited to monitor line 21 of video displayed in a pip window for violence blocking purposes. a block diagram of the Z86129/130/131 is shown in figure 1. Z86129/130/131 1 ntsc l ine 21 d ecoder speed pin count/ standard on-screen display automatic data extraction devices (mhz) package types temp. range & closed captioning v-chip time of day Z86129 12 18-pin dip, soic 0 to +70 c yes yes yes z86130 12 18-pin dip, soic 0 to +70 c no yes yes z86131 12 18-pin dip, soic 0 to +70 cno noyes
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 2 ds96tel0200 general description (continued) figure 1. Z86129 block diagram video 7 buffer vw data slicer data clk recovery sliced data data line data bus dual clamp lock sig sync slicer pg csync digital ii lock few aw vin/ intro serial control port status reg test reg slice level cg logic ph1 ph2 fr i drive osc o/s & mux control cg lines msync comp sync 5 hin 9 lpf loop 1 filter dot clk div line & char cir v lock field fld ls sfld sls control char clk cw line & fld decodes msgr dot clk sms sen sck sda sdo 6 4 15 14 16 13 vdd +5v 12 11 vss vss(a) rref por ckt 4 10 command processor row address mux display ram character generator row latch display latch ss ctr output logic 10 6 8 13 4 fld v/i ref red green blue box 17 3 2 18 addr bus addr dec addr decoder 8 Z86129 only
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 3 1 pin description absolute maximum ratings figure 2. Z86129/130/131, 18-pin dip/soic pin con?uration 1 2 3 4 5 6 7 8 9 17 16 15 14 13 12 11 10 18 v ss green* blue* sen hin sms video csync lpf red* box* sdo sck sda vin/intro v dd v ss (a) rref *Z86129 only table 1. 18-pin dip and soic pin identi?ation no. symbol function direction 1v ss power supply gnd 2* green video output output 3* blue video output output 4 sen serial enable input 5 hin horizontal in input 6 sms serial mode select input 7 video composite video input 8 csync composite sync output 9 lpf loop filter output 10 rref resistor reference input 11 v ss (a) pwr. supply (analog) gnd 12 v dd power supply 13 vin/intro vertical in/interrupt out in/output 14 sda serial data in/output 15 sck serial clock input 16 sdo serial data out output 17* box osd timing signal output 18* red video output output note: dip and soic pin configuration are identical. *however, the z86130/z86131 do not have signals on pins 2, 3, 18 and 19. symbol parameter value unit v dd dc supply voltage ?.5 to 6.0 v v in dc input voltage ?.5 to v dd +0.5 v v out dc output voltage ?.5 to v dd +0.5 v i in caution: dc input current per pin +10 ma i out dc output current per pin +20 ma i dd dc supply current +30 ma p d power dissipation per device 300 mw t stg storage temperature ?5 to +150 c t l lead temperature, 1 mm from case for 10 seconds 260 c notes: voltages referenced to v ss (a) and v ss . maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the limits specified in the dc and ac characteristics tables or pin description section.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 4 ds96tel0200 standard test conditions the characteristics listed below apply for standard test conditions as noted. all voltages are referenced to ground. positive current flows into the referenced pin (figure 3). dc electrical characteristics note: t a = 0 c to +70 c; v dd = +4.75v to +5.25v ac and timing characteristics composite video input figure 3. standard test load from output under test 150 pf 250 m a 2.1 k w +5v symbol parameter conditions min. max. unit v il input voltage low 0 0.2 v dd v v ih input voltage high 0.7 v dd v dd v v ol output voltage low i ol = 1.00 ma 0.4 v v oh output voltage high i oh = 0.75 ma v dd ?.4v v i il input leakage 0v, v dd ?.0 3.0 m a i dd supply current estimated* 30 ma k f vco gain tbd mhz/v i lp loop filter current tbd ma note: *not guaranteed parameter conditions amplitude 1.0v p-p 3 db polarity sync tips negative bandwidth 600 khz signal type interlaced max input r 470 ohms dc offset signal to be ac coupled with a minimum series capacitance of 0.1 m f
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 5 1 electrical characteristics non standard video signals must have the following characteristics: horizontal signal input (preferably h flyback) line 21 input parameters (at 1.0v p-p) note: line 21 must be in its proper position to the leading edge of the vertical sync signal. timing signals parameter conditions sync amplitude 200 mv minimum vertical pulse width 3h 0.5h vertical pulse tilt 20 mv maximum h timing phase step (head switch) 10 m s maximum fh deviation (long term) 0.5% maximum fh p-p deviation (short term) 0.3% maximum vertical sync signal the internal sync circuits will lock to all 525 or 625 line signals having a vertical sync pulse that meets the following conditions: 1. it is at least 2h wide. 2. it starts at the proper 2h boundary for its field. 3. if equalizing pulse serrations are present, they must be less than 0.125h in width. minimum signal-to-noise the Z86129/130/131 will function down to a 25 db signal-to-noise ratio (ccir weighted) with one error per row or better at that level. ratio to composite video input parameter conditions amplitude cmos level signal where low <= 0.2 v cc video lock mode: polarity frequency any 15,734.263 hz 3% hin lock mode: polarity frequency any same as display horizontal flyback pulse (hfb) pulse parameter conditions cod amplitude 50 ire code zero level 5 ire, +15 ire relative to back porch start of code 10.5 0.5 m s, (measured from the midpoint of the falling edge of the last clock run-in cycle to the midpoint of the rising edge of the start bit.) start of data 3.972 m s, ?.00 m sec, +0.30 m s (measured from the midpoint of the falling edge of the last clock run-in cycle to the midpoint of the rising edge of the start bit. parameter conditions dot 768 x fh = 12.0839 mhz dot period 82.75 ns character cell width 1.324 m s (th/48) width of row (box) 45.018 m s (34 chars = 17/24 x th width of row (char) 42.370 m s (32 chars = 2/3 x th horizontal display timing the timing of the output signals box and rgb have been set to make a centered display. the positioning of these outputs can be adjusted in 330 ns increments by writing a new value to the Z86129 h position register (address = 02h).
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 6 ds96tel0200 pin descriptions inputs video (pin 7). composite ntsc video input, 1.0v p-p (nom), band limited to 600 khz. circuit will operate with signal variation between 0.7-1.4v p-p. the polarity is sync tips negative. this signal pin should be ac coupled through a 0.1 m f capacitor and driven by a source impedance of 470 ohms or less. hin (pin 5). horizontal sync input at cmos levels. when the device is used in the video lock mode, this signal pulls the on-chip vco within the proper range. the circuit uses the frequency of this signal which must be within 3% f h but can be of either polarity. when used in the h lock mode, the vco phase locks to the rising edge of this signal. the hpol bit of the h position register can be set to operate with either polarity of input signal. this is usually the h flyback signal. the timing difference between hin rising edge and the leading edge of composite sync (of video input) is one of the factors which will affect the horizontal position of the display. any shift resulting from the timing of this signal can be compensated for with the horizontal timing value in h position register. sms (pin 6). mode select pin for the serial control port. when this input is at a cmos high state (1) the serial control port will operate in the spi mode. when the input is low (0), the serial control port will operate in the i 2 c slave mode. in spi mode, the sen pin must be tied high. (see reset operation section.) sen (pin 4). enable signal for the spi mode operation of the serial control port. when this pin is low (0), the spi port is disabled and the sdo pin is in the high-impedance state. transitions on the sck and sda pins are ignored. spi mode operation is enabled when sms is high (1). sck (pin 15). input pin for serial clock signal from the master control device. in i 2 c mode operation the clock rate is expected to be within i 2 c limits. in spi mode, the maximum clock frequency is 10 mhz. reset operation. when the sms and sen pins are both in the low (0) state, the part will be in the reset state. therefore, in the i 2 c mode the sen pin can be used as an nreset input. when spi mode is used, if three wire operation is desired, both sms and sen can be tied together and used as the nreset input. in either mode, nreset must be held low (0) for at least 100 ns. input/output vin/intro (pin 13). in external (ext) vertical lock mode of operation, the internal vertical sync circuits will lock to the vin input signal applied at this pin. the part will lock to the rising or falling edge of the signal in accordance with the setting of the v polarity command. the default is rising edge. the vin pulse must be at least 2 lines wide. in intro mode, when configured for internal vertical synchronization, this pin will be an output pin providing an interrupt signal to the master control device in accordance with the settings in the interrupt mask register. sda (pin 14). when the serial control port has been set to i 2 c mode operation, this pin serves as the bidirectional data line for sending and receiving serial data. in spi mode operation it operates as serial data input. spi mode output data is available on the sdo pin. outputs sdo (pin 16). provides the serial data output when spi mode communications have been selected. this pin is not used in i 2 c mode operation. box (pin 17*). black box keying output is an active high, cmos level signal used to key in the black box in the captions/text displays. this output will be in the high- impedance state when the background attribute has been set to semi-transparent (*Z86129 only). red, green, blue (pins 2*, 3*, 18*). positive acting cmos levels signals (*Z86129 only). color mode: red, green and blue character video outputs for use in a color receiver. n mono mode: all three outputs carry the character luminance information. notes: the selection of color/mono mode is user controlled in bit d 1 of the configuration register (address=00h). (see internal registers section.).
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 7 1 pins with external components csync (pin 8). sync slice level. a 0.1 m f capacitor must be tied between this pin and analog ground v ss (a). this capacitor stores the sync slice level voltage. lpf (pin 9). loop filter. a series rc low-pass filter must be tied between this pin and analog ground v ss (a). there must also be second capacitor from the pin to v ss (a). values for the three parts to be specified at a later date. rref (pin 10). reference setting resistor. resistor must be 10 kohms, 2%. power supply v dd (pin 12). the voltage on this pin is nominally 5.0 volts and may range between 4.75 to 5.25 volts with respect to the v ss pins. v ss (pins 1, 11). these pins are the lowest potential power pins for the analog and digital circuits. they are normally tied to system ground. note: the recommended printed circuit pattern for implementing the power connection and critical components will be supplied at a later date. Z86129/130/131 block diagram description the Z86129 is designed to process both fields of line 21 of the television vbi and provide the functional performance of a line 21 closed-caption decoder and extended data service decoder. it requires two input signals, composite video and a horizontal timing signal (hin), and several passive components for proper operation. a vertical input signal is also required if osd display mode is desired when no video signal is present. the decoder performs several functions, namely extraction of the data from line 21, separation of the normal line 21 data from the xds data, on-screen display (Z86129 only) of the selected data channel and outputting of the xds data through the serial communications channel. input signals the composite video input should be a signal which is nominally 1.0 volt p-p with sync tips negative and band limited to 600 khz. the Z86129 will operate with an input level variation of 3 db. the hin input signal is required to bring the vco close to the desired operating frequency. it must be a cmos level signal. the hin signal can have positive or negative polarity and is only required to be within 3% of the standard h frequency. when configured for ext hlk operation, this signal should correspond to the h flyback signal. the timing difference between hin rising edge and the leading edge of composite sync (of video input) is one of the factors that will affect the horizontal position of the display. any shift resulting from the timing of this signal can be compensated for with the horizontal timing value in the h position register. video input signal processing the comp video input is ac coupled to the device where the sync tip is internally clamped to a fixed reference voltage by means of a dual clamp. initially, the unlocked signal is clamped using a simple clamp. improved impulse noise performance is then achieved after the internal sync circuits lock to the incoming signal. noise rejection is obtained by making the clamp operative only during the sync tip. the clamped composite video signal is fed to both the data slicer and sync slicer blocks. the data slicer generates a clean cmos level data signal by slicing the signal at its midpoint. the slice level is established on an adaptive basis during line 21. the resultant value is stored until the next occurrence of that line 21. a high level of noise immunity is achieved by using this process. the sync slicer processes the clamped comp video signal to extract comp sync. this signal is used to lock the internally generated sync to the incoming video when the video lock mode of operation has been enabled. sync slicing is performed in two steps. in the non-locked mode, the sync is sliced at a fixed offset level from the sync tip. when proper lock operation has been achieved, the slice level voltage switches from a fixed reference level to an adaptive level. the slice level is stored on the sync slice capacitor, csync. the data clock recovery circuit operates in conjunction with the digital h lock circuit. they produce a 32h clock signal (dclk) that is locked in phase to the clock run-in burst portion of the sliced data obtained from the data slicer. when line 21 code appears, dclk phase lock is achieved during the clock run-in burst and used to reclock the sliced data. once phase lock is established it is maintained until a change in video signal occurs. the digital h lock circuit produces the video timing gates, pg, stg, and so on, which are locked in phase with hsync, the video timing signal, no matter which h lock mode is used in the display generation circuits. this independent phase lock loop is able to respond quickly to changes in video timing, without concern for display stability requirements.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 8 ds96tel0200 Z86129/130/131 block diagram description (continued) vco and one shot all internal timing and synchronizing signals are derived from the on-board 12 mhz vco. its output is the dot clk signal used to drive the horizontal and vertical counter chains and for display timing. the one shot circuit produces a horizontal timing signal derived from the incoming video and qualified by the copy guard logic circuits. the vco can be locked in phase to two different sources. for television operation, where a good horizontal display timing signal is available, the vco is locked to the hin input through the action of the phase detector (ph2). when a proper hin signal is not available, such as in a vcr, the vco can be locked to the incoming video through the phase detector (ph1). in this case the frequency detector (fr) circuit is activated as required to bring the vco within the pull-in range of ph1. timing and counting circuits the dot clk is first divided down to produce the character timing clock char clk. this signal is then further divided to generate the horizontal timing signals, h, 2h and hsqr. these timing signals are used in the data output (display) circuits. the h signal is further divided in the line and fld cntr to produce the various decodes used to establish vertical lock and to time the display and control functions required for proper operation. the h signal is also used to generate the smooth scroll timing signal for display. the v lock circuits produce a noise free vertical pulse derived from the horizontal timing signal. when the user selects video as the vertical lock source, the internal synchronizing signals are phased up with the incoming video by comparing the internally generated vertical pulse to an input vertical pulse derived from the comp sync signal provided by the sync slicer. in the vertical lock set to vin mode the vin signal is used in place of the signal derived from comp sync. in either case, when proper phasing has been established, this circuit outputs the lock signal which is used to provide additional noise immunity to the slicing circuits. the locked state is established only after several successive fields have occurred in which these two vertical pulses remain in sync. once locked, the internal timing will flywheel until such time as the two vertical pulses lose coincidence for a number of consecutive fields. until lock is established, the decoder operates on a pulse for pulse basis. command processor the command processor circuit controls the manipulation of the data for storage and display. it processes the control port input commands to determine the display status desired and the data channel selected. during the display time (lines 43-237), this information is used to control the loading, addressing and clearing of the display ram and the operations of the character rom and output logic circuits. during data recovery time (tv lines 21-42), the command processor, in conjunction with the data recovery circuits, recovers the xds data and the data for the selected data channel. data is sent to the ram for storage and display and/or to the serial port, as appropriate. where necessary, the command processor converts the input data to the appropriate form. output logic (Z86129 only) the output logic circuits operate together to generate the output color signals red, green and blue and the box signal. when monochrome mode is selected all three color outputs will carry the luminance information. these outputs are positive output logic signals. the character rom contains the dot pattern for all the characters. the output logic provides the hardware underline, graphics characters and the italics slant generator circuits. the smooth scroll display is achieved by the smooth scroll counter logic controlling the addressing of the character rom. decoder control circuit the decoder control circuit block is the users communications port. it converts the information provided to the control port into the internal control signals required to establish the operating mode of the decoder. this port can be operated in one of two serial modes. the sms pin is used to establish the serial control mode to be used. in the two wire (i 2 c) control mode, the Z86129/130/131 will respond to its slave address for both the read and write conditions. if the read bit is low (indicating a write sequence) then the Z86129/130/131 will respond with an acknowledge. the master should then send an address byte followed by a data byte. if the read bit is high (indicating a read sequence) then the Z86129/130/131 will respond with an acknowledge followed by a status byte then a data byte. read data will only be available through indirect addressing. write addressing will have both indirect and direct modes. the busy bit in the status byte will indicate if the write operation has been completed or if read data is available.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 9 1 the spi mode is a three wire bus with the Z86129/130/131 performing as the slave device. communication is synchronized by the sck signal generated by the master. typically, the serial data output is transmitted on the falling edge of sck and the received data is captured on the rising edge of sck. all data is exchanged as 8-bit bytes. voltage/current reference the voltage/current reference circuit uses an externally connected resistor to establish the reference levels that are used throughout the Z86129/130/131. the use of an external resistor provides improved internal precision at minimal additional cost. Z86129/130/131 functional description the Z86129 provides full function ntsc, line 21 performance. input commands are included to enable the decoder to process and display any of the eight caption/text data channels (cc1, cc2, cc3, cc4, t1, t2, t3 or t4) contained in line 21 of either field of the incoming video. xds data can also be selected for display. the decoder on/off commands control whether or not the line 21 data in the selected channel is actually displayed. when switched to the decoder off (tv) state, incoming data in the selected channel will still be processed but not displayed. the Z86129/130/131 can also be configured to operate with pal or secam video signals. it will decode information encoded into its vbi in line 22. the encoded data must conform to the waveform and command structure defined for ntsc line 21 operation. vco lock the design includes a vco with stable gain characteristics and good power supply rejection. the internal horizontal and vertical synchronizing circuits provide a high degree of noise immunity. there are options for both horizontal and vertical lock. the vco can be phase locked either to the horizontal signal derived from the video input signal (video) or to the externally supplied hin signal, typically horizontal flyback. hin lock is used to provide a display having a minimum of observable jitter. this requires an hin signal derived from the tv display and of the proper polarity. such a signal is readily available in a television receiver. video lock mode enables the vco to lock in phase to the incoming video signal, thus providing good operation in an application where no display related hin signal is available, such as in a vcr. video timing timing signals are derived from the vco for use in the line counting and display circuits. line counting requires proper identification of the input signal's vertical pulse. default operation uses the vertical sync signal derived from the video input signal as the source for vertical lock. this method results in locking characteristics having good performance and good noise immunity. in the event that osd operation is required under conditions when no input video is present, it would be necessary to set the Z86129 for vin lock. in this mode, the vertical timing will be determined from the vertical pulse signal supplied to the vin pin. the horizontal position of the caption display is determined by the internal timing circuits. a default condition has been established that should result in a well centered display in a typical application. however, since signal delays through video processing circuits can vary between designs, the Z86129 provides the user with the ability to change the default timing. no matter which of the horizontal lock modes are selected, the display horizontal position on the screen can be adjusted in quarter character (330 ns) steps by serial port commands. displayable character set (Z86129 only) normal mode. characters are displayed as white or colored dot matrix characters on an opaque background. the box is normally black but the Z86129 can be set to a blue background box with a serial command. the characters are described by a 12 by 18 dot pattern within a character cell which is 16 dots wide by 26 dots high per frame. the location of the character luminance within the character cell varies from character to character to allow for the display of lower case letters with descenders. all characters have at least a 1-dot border of black around each character. underline is also provided. figure 4 shows the Z86129 standard character map and font. the character rom consists of a 12 by 18 dot matrix pattern per character. figure 5 shows the character font. alternate rows and columns are read out in each field to produce an interleaved and rounded character. a display row contains a maximum of 32 characters plus a leading and trailing black box, each a character cell in width, making the overall width of a display row 34 x 8 = 272 dots. successive display rows are butted together so that the total display occupies 195 dots high. the black box 34 character cells wide by 195 dots high results in a box size of 45.018 m s in width by 195 scan lines in height. the box starts in scan line 43 and extends to scan line 237. theoretically, the display will be horizontally centered in the video display when the box starts 13.2 m s after the leading edge of h.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 10 ds96tel0200 Z86129/130/131 functional description (continued) the default setting of the Z86129 places the center of the box at about 13.5 m s to allow for some delay in the normal video path. however, the box horizontal position can be adjusted by the user in 330 ns increments. the display will be approximately within the safe title area for ntsc receivers. character width is 42.37 m s also centered on the screen, resulting in a leading and trailing 1.32 m s black border. an optional caption display mode, drop shadow, can be selected by the user through the serial port. this display mode eliminates the black box around the characters and places a 2-dot black shadow to the right and below the character luminance dots when in the 15 scan line per row mode. this display mode is usable in captions, text and osd displays. figure 5 shows the characters with shadowing added. extended features eia-608 defined new extended features such as optional background and foreground display attributes and optional extended characters. the Z86129 will always respond to the extended characters but the extended background/foreground response can be controlled by the user. the background and foreground attributes add codes for background colors, black foreground as well as transparent, opaque and semi-transparent background. the box signal output pin will be set to a tri-state condition whenever one of the semi-transparent attribute codes is active. the external keying circuits can then use this condition to implement the intended video display. the font for the extended characters are shown in figure 6 . the accented capital letters have been implemented by placing the accent marks above the character cell. when selected, this mode will result in the accent marks being written into the character cell space of the row above. in some operating modes the Z86129 will expand the size of the overall box height by adding two additional scan lines at the top and one additional line at the bottom. this will make room for the accent marks in the topmost row and add a black line below the descenders of any lowercase characters in the last row. this approach is desirable because shrinking the capitals to make room for the accent mark within the character cell makes poor quality characters and in some cases there would be no differentiation between the capital and lower case letter. it also has the advantage of minimizing the rom size and providing a good readable font that closely matches what is normally seen in print. in the unlikely case of a conflict between an accented capital letter in one row and a lower case descender in the same character position in the row above, the descender is given priority. the improved readability of this approach over shrunk capital letters far outweighs this potential conflict and results in a cost-effective compromise for providing a full, extended features implementation. the extended characters share their address space with the osd graphics characters. when a box display is used the extended character set is in force. however, if a drop shadow display is used the graphics characters are in force. for caption and text display modes, if drop shadow is set, the user must also command the Z86129 to switch back to extended characters.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 11 1 figure 4. Z86129 standard character map and font
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 12 ds96tel0200 Z86129/130/131 functional description (continued) figure 5. caption display mode, drop shadow
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 13 1 figure 6. extended characters font
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 14 ds96tel0200 Z86129/130/131 functional description (continued) text mode display (Z86129 only) when text mode is selected, a black box will be displayed as long as valid line 21 code in the field selected is being detected. the Z86129 provides the option to make the box blue instead of black. this option holds for captions as well as text. the default text display mode uses a 15 row by 34 character black box. text characters will be displayed as they are received starting in the top row. successive carriage returns will move the display down successive rows until all 15 rows have been displayed. thereafter, the text will scroll up as new characters are added to the bottom row. if the data for the selected channel is interrupted by a command for another channel, data processing will stop but the display will remain. when a resume text command is received, data processing will resume and the new characters will be added starting at the position that the display row/column pointer was in at the interruption of data processing. if a start text command is received, the display will be cleared and new characters will be displayed starting in row 1, column 1 (left side). the number of display rows and the location (base row) of the text box, can be altered by the user. in this way, the user can decide how much of the screen can be covered when displaying non-program related information. when scrolling, the display will shift one scan line per frame until a complete row has been scrolled. if a carriage return is received before scrolling is complete, the display will immediately complete the ?croll?by jumping up the remaining scan lines and start displaying the new text. caption mode display (Z86129 only) according to the fcc specifications caption data can appear in any of the 15 display rows but a single caption may consist of no more than 4 rows. the form of the caption display depends on the caption mode indicated by the transmitted caption command, pop-on, paint-on or roll-up. the Z86129 can display a single caption having as many as eight rows. when any of the caption display modes have been selected, the screen will be transparent. (display box is only present when a caption is being displayed.) pop-on captions work with two caption memories. one of them is normally displayed while the other is being used to accumulate new caption data. a new caption is popped-on by swapping the two memories with the end of caption (eoc) command. when the on-screen memory is erased, the screen is blank (transparent) and the memory will default to the row/column pointer at row 1, column 1 and monochrome non-underlined. when caption mode is selected, the decoder will process any data following the resume caption loading (rcl) command (or the eoc). normally, this command will be followed by a preamble address code (pac) to indicate the row, column and character attributes to be used with the following data. if no pac is received the data will be added to the location last indicated by the row/column pointer prior to the receipt of the rcl command. paint-on caption mode is essentially equivalent to the pop- on mode except that the data received after the resume direct captioning (rdc) command is written to the on- screen memory rather than the off-screen memory. all the rules for pacs, midcodes, and so on, are otherwise the same. roll-up caption mode presents a ?ext?like display that is limited to 2, 3 or 4 rows, depending on the resume roll- up (run) command used. the pac following the run command is used as the base row for the roll-up display. the base row will be the ?ottom?row of the roll-up display. in this case, the black box does not appear until characters are being displayed and the box is only wide enough to provide a leading and trailing box in each line. the new data appears in the bottom row and as each carriage return is received, the row scrolls up and the new data added to the bottom. when the number of rows indicated by the resume command has been reached, the data in the top row scrolls off as new data is added to the bottom. the tab (indent) pac permits placing captions starting at 4 character boundaries in any caption row. the tab offset command provides the means for adjusting the starting position for a caption at any column position in the current row.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 15 1 xds display modes (Z86129 only) two preprogrammed xds display modes are provided. one provides information about the current program that would be of interest for ?hannel grazing? the second display shows the grazing packets plus additional xds packets which will inform the viewer about the program content. information will be displayed as it is received. the displays use drop shadow mode with 15 scan lines per row. the xdsg mode is the graze (channel grazing) display (figure 7). the display will contain three rows of information at the top of the screen, formatted for easy reading. they will contain the following xds packet information: the xdsf mode is the full (information) display (figure 8). this display shows the same information as the graze display and adds the program type as well the first four program description rows (if transmitted). although xds defines eight program description rows, the first four are identified as containing the most important information. the display of program description is limited to the first four rows because eight rows would obscure much of the screen and because more than four rows is not likely to be sent due to the time required for transmission. since 15 scan lines per row mode is being used, rows 10- 13 will appear at the bottom of the screen. when an xds display mode has been selected, the information will be displayed as the appropriate packets are received. the display will remain on screen as long as valid xds data continues to be received. if the 16 second erase timer is enabled (the default condition), the xds display will be erased when no valid xds data has been received for 16 seconds. if subsequent xds data is received with displayable packets, that information will reappear on the screen. xds data recovery can be active in the xds display mode. the xds display mode is turned off by selecting a different display mode. osd row 1 network name, call letters (green) osd row 2 program name (italics, underline, white) osd row 3 program length, time in show (cyan) figure 7. xdsg (graze) mode sample display network name call letters program name program length time in show osd row 1 osd row 3 osd row 2 osd row 1 network name, call letters (green) osd row 2 program name (italics, underline, white) osd row 3 program length, program type, time in show (cyan) osd row 10 program description row 1 (yellow) osd row 11 program description row 2 (yellow) osd row 12 program description row 3 (yellow) osd row 13 program description row 4 (yellow) figure 8. xdsf mode sample display network name call letters program name program length time in show osd row 1 osd row 3 osd row 2 program description information goes here on osd rows 10, 11 12 and, 13
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 16 ds96tel0200 display erase and autoblanking (Z86129 only) the display is erased in the text mode by the start text command (but the box is maintained) and in the caption mode by the erase displayed memory (edm) command. the non-displayed memory can be erased by the erase non-displayed memory (enm) command. four other events can also cause the display to be erased. 1. a change in the display mode, such as from cc1 to t1, cc1 to xdsf, and so forth, will clear the memory and hence the display. 2. a loss of video lock, such as on a channel change, will cause the screen to be cleared. the current active display mode will not be changed. for example if cc1 was selected and on before the channel change the device will remain in the cc1/on state after channel change. 3. the third action that will clear the displayed memory is when the autoblanking circuit is activated. the autoblanking circuit monitors the presence of a line 21 waveform in the video field corresponding to the data channel selected for display. the decoder is held in the decoder off (tv) state until a line 21 waveform is continuously detected for a period of 0.5 seconds. once a valid line 21 waveform has been detected for 0.5 seconds, and assuming that the user has selected the decoder on state, the normal display for the data channel selected will be presented. the autoblanking circuit will be not activate again until a valid line 21 waveform has been lost for 1.5 seconds. any data received during the 1.5 second period will reset the counter so that autoblanking will only be activated on continuous loss of the line 21 waveform for 1.5 seconds. note: valid line 21 waveform is defined as the presence of a 7-cycle run-in clock and a start bit on line 21 of the field being examined. 4. the fourth method of clearing the screen is by the action of the 16 second erase timer. this function is only active when a caption or xds display mode has been selected. if no data is received for the display channel selected for a 16 second period, the on-screen memory will be erased. the decoder will still be in the selected channel and with the decoder on, so that when data for the selected channels resumes, it will be displayed. Z86129/130/131 feature set the primary features of the Z86129/130/131 are briefly described below. more complete descriptions can be found in later sections of this document. vbi data processing the Z86129/130/131 extracts the data in line 21 of the incoming video. all data channels, in both video fields are supported. specifically, the Z86129 can: n process data from both fields of line 21 simultaneously. n output xds data through the serial port while displaying selected data. n output xds data through the serial port raw or filtered. n xds filters are selectable from a list of pre- programmed values including program rating and time of day/local time. n ntsc or pal operation selectable. the data extracted from line 21 of the incoming video by the Z86129 may be displayed in different ways according to the user selection and the type of data. the display features available on the Z86129 only are: n ten different line 21 data display modes; cc1-cc4, t1-t4, plus two standard templates for xds displays. n pop-on, paint-on and roll-up caption displays. n text display default is a full screen, 15 row display. n user can vertically reduce and reposition the text display as desired. n color or monochrome display mode selectable. n xdsg display mode (channel grazing): automatic display of network name, call letters, program name, program length, and time in show data packets. n xdsf display mode (full information): automatic display of xdsg display mode information plus: program type (only basic types), and program description.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 17 1 general purpose osd modes (Z86129 only) in addition to displaying data extracted from line 21 of the incoming video, the Z86129 can display information supplied through its serial port. this is referred to as on- screen display (osd) display mode. this mode provides: n programmable full screen osd: 15 display rows by 32 character columns n graphics characters n double high and double wide characters n fully programmable display positioning; information may be placed anywhere on the screen. n accepts externally supplied, or internally generated vsync to enable osd even when no video is present. character set the Z86129 has a new character set with extended features, such as: n new font with descenders on lower case letters n optional display mode using drop shadow font (in other words, fringing appears on each character rather than a solid, ?lack box?background). n eia-608 extended characters n eia-608 background and foreground attributes n special framing and graphics characters for osd display. n double high and double wide character display for osd. n fifteen scan lines per character row for osd and text. note: contact the nearest zilog sales office for additional information on how to define your own custom osd character set. serial communications interface communications and control of the Z86129/130/131 is through a serial control interface. two serial control modes are available with the Z86129/130/131 performing as a slave device. these modes are: 1. a two wire, i 2 c interface. 2. a three wire, serial peripheral interface (spi). 3. a total of five device pins are dedicated to the serial control port function. these pins are designated as: i 2 c mode. the i 2 c port on the Z86129/130/131 always acts as a slave device. i 2 c mode is selected by bringing the sms pin low and the sen pin high. sen must remain high whenever i 2 c mode is desired. if the sen pin is brought low, with sms also low, the part will be reset. sda and sck are the data and clock lines of the i 2 c port, respectively. during i 2 c mode operation the vin/intro signal (pin 13), can be configured to generate interrupt requests to the master device on selected events. (see note paragraph below.) spi mode. sspi mode is selected by making the sms pin high. in spi mode the Z86129/130/131 acts as a slave device. all communications are clocked in and out as 8-bit bytes. sck is the serial clock (input), sda is data-in and sdo is data-out. the sen pin enables communication when high, when low high high high, the sdo pin is tri- state. table 2. Z86129/130/131 serial control signals signal sms sck sda sdo sen pin # 615 14 16 4 i/o i i i/o o i i 2 c 0 clk data na 1 spi 1 clk data in data out enable notes: sms = serial mode select high = spi and low = i 2 c sck = serial port clock for either serial mode. sda = serial port data for i 2 c mode and data in for spi mode. sdo = serial data out for spi mode. not used in i 2 c mode. sen = spi mode enable signal. must be high for i 2 c mode.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 18 ds96tel0200 Z86129/130/131 feature set (continued) when sen is brought high the part will be synchronized and waiting for a command. if sen is tied high, the part can also be synchronized by a command string. during spi mode operation the vin/intro signal (pin 13), can be configured to generate interrupt requests to the master device on selected events. (see note paragraph below.) caution: when the sen and sms pins are made low simultaneously, the part will be reset. interrupt generation. the vin/intro signal (pin 13) can be configured to provide an interrupt output on selected events. the configuration of vin/intro (pin 13) is user programmable to be either of two states: 1. an input pin for acceptance of an external vsync timing signal 2. an output pin for interrupt generation on a selected events note: configuring vin/intro as an output for interrupt generation is particularly useful when implementing the v-chip feature in tvs and vcrs. in this configuration, pin 13 is used to interrupt the host processor when the xds program rating data packet is found. as a result the host processor is not burdened with monitoring or filtering the line 21 data stream. the Z86129/130/131 filters the line 21 data stream for the host processor, and generates an interrupt only when the desired packet is found. setup and operational control the Z86129/130/131 is extremely flexible and fully programmable through its serial communication port. the following tables provide a partial list of user- programmable features, user selectable display modes, and default conditions upon reset. Z86129/130/131 programmable features decoder on/off tv scan lines per osd row (13 or 15) eia-608 extended attributes on/off osd drop shadow on/off color/monochrome osd horizontal start position text box size (# of rows) text box starting row position ntsc or pal vertical lock source: video or external vin xds data output, raw or filtered h lock source: video or external hin in addition to the programmable features just listed, the Z86129 offers a choice of eleven display modes for user selection. the Z86129/130/131 is initialized on reset to the following default conditions: table 3. Z86129 display modes display mode display data ntsc field language cc1 l21 closed captions cc2 l21 closed captions 1 (odd) i cc3 l21 closed captions 1ii cc4 l21 closed captions 2 (even) i t1 l21 text 2 ii t2 l21 text 1 i t3 l21 text 1 ii t4 l21 text 2 i xdsf xds 2 ii xdsg xds 2 n/a osd user de?ed via serial port 2 n/a table 4. reset default conditions parameter reset condition display channel cc1 decoder off text size 15 rows lines/row 13 background box eia-608 extended attributes on data outputs off video standard ntsc data outputs off vco lock video box timing 13.5usec vertical lock video vin/intro intro & disabled horizontal lock video color/mono color osd display drop shadow 15 lines/row
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 19 1 serial communications interface commands and data are sent to and from the Z86129 through its serial communications interface. two serial control modes are available. one mode is a two wire i 2 c bus interface. the other serial mode is a three wire, synchronous serial peripheral interface (spi). in both cases the Z86129/130/131 acts as a slave device. this port is the path for setting the configuration and operational modes of the device. it is also the port for outputting the recovered xds data and for inputting the osd data for display. five pins are dedicated to the control port function and one additional pin can be configured to provide an interrupt output. these pins are designated as shown in table 5. when the vertical lock = video, the vin/intro (pin13) is configured as an output, providing the intro signal. this interrupt operation is available in either serial control mode. the Z86129/130/131 is able to interrupt on the occurrence of any of several events. the master device will clear the interrupt by writing to the interrupt request register. i 2 c bus operation the serial control mode in use is selected by the state of the sms pin. when sms is set low, the Z86129/130/131 will be in the i 2 c mode. in this mode, the Z86129 also supports a bidirectional two wire bus and data transmission protocol. the bus is controlled by the master device, which generates the serial clock (sck), controls the bus access and generates the start and stop conditions. the sda pin is the bidirectional data line. in this mode the sdo output is not used and the pin will be in its high impedance state. the Z86129/130/131 can receive or transmit data under control of the master device. the Z86129/130/131 is a slave device. communication is initiated when the master device sends the start condition followed by the Z86129/130/131 slave address read byte (29h) or slave address write byte (28h). the Z86129/130/131 will respond with an acknowledge. the i 2 c rd/nwr bit is the least significant bit (lsb) of the i 2 c addresses listed below in table 6. the i 2 c bus protocol 1. data transfer can only be started when the bus is not busy. 2. during data transfer, data transitions must not occur while the clock is high. bus conditions are defined as: not busy: data and clock lines both high. start: a high to low transition of sda line while sck line is high. stop: a low to high transition of sda line while sck line is high. acknowledge: when addressed, the receiving device must output an acknowledge after the reception of each byte. the master device must generate the clock for the acknowledge bit. acknowledge is sda=low. not acknowledge (nack) is sda=high. data: the data (sda) is output by the transmitting device on the falling edge of sck, msb first. the receiving device will read the data, msb first, on the rising edge of sck. communication with the Z86129/130/131 is initiated when the master device sends the Z86129/130/131 slave address following a start condition. the Z86129/130/131 has a preset, single, seven-bit slave address. the Z86129 will respond with an acknowledge. the eighth bit of the slave address is driven high for read operations and low for write operations. table 5. Z86129/130/131 serial control signals signal sms sck sda sdo sen pin # 615 14 16 4 i/o i i i/o o i i2c 0 clk data hi-z 1 spi 1 clk data in data out enable notes: sms = serial mode select high = spi & low = i 2 c sck = serial port clock for either serial mode. sda = serial port data for i 2 c mode and data in for spi mode. sdo = serial data out for spi mode. not used in i 2 c mode. sen = spi mode enable signal. must be high for i 2 c mode. table 6. Z86129/130/131 i 2 c slave addresses read write i 2 c address 29h 28h note: when the sms and sen pins are both low, the part will be in the reset state. therefore the sen pin can be used to reset the part while in the i 2 c mode. the sen pin may be tied to an nreset signal or tied high if no reset is desired.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 20 ds96tel0200 serial communications interface (continued) writing to the i 2 c bus all write commands are either one or two byte commands. the Z86129/130/131 is enabled when a start condition followed by its slave address write byte is received. it will be disabled once it deems the command to have been completed or by a stop condition. a new start condition without a stop condition will begin a new sequence. therefore, successive commands may be executed by successive strings of ?tart-slave address-command sequences without any intervening stop condition being sent. notes: the number of data bytes to be received by the Z86129/130/131 is inherent in the command and the Z86129/130/131 will respond with the acknowledge signal only for the number of bytes expected. if the master writes more bytes than expected, there will be no acknowledge for the extra bytes. a write to the Z86129/130/131 should always be preceded by executing a status read to verify that the Z86129/130/131 is not busy. the status register data is output immediately following the reception of the slave address read. if the rdy bit is set, the master device can initiate its write sequence, always beginning with the start condition. the first byte of a two byte command is always written first. an example of the master's sequence for writing a two byte command (after rdy had been checked) would be: start-slave address write/slave ack-cmd (master)/ slave ack-data (master)/slave ack-stop. reading data using the i 2 c bus with the exception of the serial status (ss) register, which may be read at any time, each read operation must be set up before the data can be read from the serial output registers of the Z86129/130/131. data is set up for a read operation either automatically or manually. xds data reads are set up automatically upon recovery by setting a valid xds filter register selection. all other data read operations must be set up manually using the read select commands rds1 and rds2. these commands load the selected data byte or pair of bytes into the serial output register(s), set the ss register rd2 bit according to the number of data bytes requested and set the ss register dav bit to indicate availability of data. the Z86129/130/131 i 2 c bus supports one, two and three byte read sequences. all read sequences output the ss register as the first output byte. if the s erial s tatus dav bit is set, a two or three byte read sequence can then be initiated, beginning with a new strt condition. if the dav bit is not set, the i 2 c master device should not attempt to read any data bytes or the desired data can be lost from the Z86129/130/131output registers. the number of data bytes available is indicated by the state of the rd2 bit of the serial status. in a typical read operation the status byte is read and the dav and rd2 bits are examined. if one or two data bytes are available they are read in sequence separated by acknowledges. note: in all i 2 c read operations (one, two, and three byte as defined in figure 10) the last byte read from the Z86129/130/131 should be acknowledged by the master with a nack (not acknowledge). it is also necessary to read all available data in a read operation to clear the dav bit and permit subsequent reads. dav is cleared by the master clocking out the eighth bit of the last data-byte read. dav is never cleared by just reading the ssb (one- byte read) alone. all data is output msb first. figure 9. i 2 c bus write (command) strt stop slave addr cmd i 2 c-one byte write (command) (write=28h) write i 2 c-two byte write (command & data) strt stop slave write addr cmd (write=28h) write data note: status register rdy bit must be read and checked prior to the strt condition of either write sequence above. see one byte read (status only) in figure 10 for more information on reading the status register.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 21 1 the master's sequence for reading two data bytes (total of three bytes including ssb) from the Z86129/130/131 is given as: start-slave address read/slave ack-ss byte/master ack-byte (slave)/master ack-byte (slave)/master nack- stop clock and data transitions. the sck and sda bus lines are normally pulled high with a resistor. data on the sda bus may only change during sck low time periods. data changes during sck high periods will indicate a start or stop condition as defined in table 7. start condition. a high-to-low transition of sda with sck high is a start condition which must precede any other command. stop condition. a low-to-high transition of sda with sck high is a stop condition which terminates all communications. acknowledge. all address and data words are serially transmitted to and from the Z86129/130/131 in eight bit words. a ninth bit time is used for the acknowledge. the acknowledging device does so by pulling the sda bus low during the ninth bit. a not acknowledge (nack) is given by sda=high during the ninth clock time. figure 10. i 2 c bus read (command) strt stop slave serial addr status (read=29h) (ssb) nack strt stop slave serial addr status (read=29h) (ssb) read data1 nack strt stop slave serial addr status (read=29h) (ssb) read data1 read data2 nack i 2 c-one byte write (status only) i 2 c-two byte read (status & data1) i 2 c-three byte read (status, data1, & data2) note: in all i 2 c read operations de?ed herein, the last byte read from the Z86129/130/131 must be acknowledged by the master with a nack (not acknowledge). figure 11. i 2 c serial timing sda (in) sck sda (out) t su.sta t hd.sta t aa t f t high t low t hd.dat t su.dat t dh t r t su.st o t buf table 7. i 2 c serial timing min/max symbol parameter min max units f sck clock frequency 100 khz t low clock pulse width low 4.7 m s t high clock pulse width high 4.0 m s t r sda and scl rise time 1.0 m s t f sda and scl fall time 300 ns t aa clock low to data out valid 0.1 3.5 m s t buf bus free time 4.7 m s t hd.sta start hold time 4.0 m s t su.sta start set-up time 4.7 m s t hd.dat data in hold time 0 m s t su.dat data in set-up time 250 ns t su.sto stop set-up time 4.7 m s t dh data out hold time 100 ns t i input filter time constant 100 ns
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 22 ds96tel0200 serial communications interface (continued) spi bus operation when the sms pin is high the Z86129/130/131 will be in the spi serial control mode. the clock line should be tied to the sck pin. the data in signal and data out signal from the master device should be connected to the sda and sdo pins respectively. the sen pin is used to select the Z86129/130/131 when there are multiple peripherals on the bus. as noted above, when both the sms and sen pins are low, the part is in the reset state. when the spi bus is used in a dedicated fashion between the master and the Z86129/130/131, both the sen and sms pins would be tied high. the reset function would require that both of these pins be tied to the nreset signal. to ensure synchronization, the master should send the serial synchronization signal after the reset is released. when the spi mode is used in a multiple peripheral environment, the sen pin is used as the Z86129/130/131 enable signal. sms could then be used for the nreset signal as long as reset was only applied while sen was low. in this case, there would be no need for the master to send a serial synchronization string after reset if there was at least 100 ns between the end of reset and the start of port enable. a command string can be interrupted at any time and the port resynchronized by sending the serial sync signal or by the rising edge of sen. the spi bus is a three wire bus when used in a dedicated manner between the Z86129/130/131 and the master device. if other peripherals are connected to the bus, then the sen pin must be used to place this device on the bus at the appropriate time. when sen is low, the sdo pin will be tri-state and transitions on the sck and sda pins will be ignored. if data output is not required from the Z86129/130/131, then control can be accomplished using only the sck and sda pins. since this type of operation precludes the ability to check the rdy bit, it is very important that commands be spaced by at least two frames (133 m sec) to ensure that one command has been executed before initiating another. the bus is controlled by the master device, which generates the serial clock (sck) and initiates all actions. clocking data in on sda will simultaneously produce data out on sdo. the master should always check for the appropriate handshake signal before executing any command other than nop. writing to the part requires that the rdy bit be set while reading from the part requires checking the ss register to see if the dav bit is set. both of these bits are contained in the serial status (ss) register. writing to the Z86129/130/131 will concurrently output the contents of the ss register, msb first, unless other data is being output as a result of one of the read commands. if it is desired to read the ss without executing a command, the nop command can be written at any time, even if the serial status rdy bit is not set. the rdy status bit is driven onto the sdo pin between command transmissions. the controlling mcu can test the state of this pin without clocking in order to determine if subsequent serial transfers are possible. the dav bit can only be checked by outputting the contents of the ss register. writing to the spi bus all write commands are either one or two byte commands. the number of data bytes to be received by the Z86129/130/131 is inherent in the command. if the master writes more bytes than expected, the command may be overwritten or corrupted by the extraneous bytes. a write to the Z86129/130/131 should always be preceded by executing a status read to verify that the device is ready. the serial status is output by the device concurrent with the input of any command byte. if the rdy bit of the serial status register is set, the master device can write a new command. the command and data bytes are written msb first. the first byte of a two byte command is sent first. the bits are clocked into the Z86129/130/131 by placing the data on the sda input and bringing sck high. reading data using the spi bus with the exception of the ss read, each read operation must be set up before the data can actually be read from the serial output registers of the device. data is set up for a read operation either automatically or manually. xds data is set up for read automatically upon recovery by setting a valid xds filter register selection. all other data read operations must be set up manually, using the read select commands rds1 and rds2. these commands load the selected data byte or pair of bytes into the serial output registers, set the ss register rd2 bit according to the number of data bytes requested and set the serial status dav bit to indicate availability of data. the Z86129/130/131 spi bus supports two and three byte read sequences. in spi mode, the ss must be read before a read sequence is started so that the dav and rd2 bits can be checked. the number of data bytes available is indicated by the state of the rd2 bit. the special command read1 or read2 is then used to read the one or two available data bytes. the serial status is clocked out during
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 23 1 the write of the read1 or read2 command. the data byte or bytes are then clocked-out in sequence, msb first, while nop commands are written into the device. data bits are clocked-out on the rising edge of sck. all available data bytes must be read to clear the dav bit and permit subsequent reads. the spi bus protocol 1. the first bit of the first output byte is driven out on sdo following the rising edge of sck on the last bit (lsb) of the read1 or read2 command. 2. three-wire bus with clock signal on sck pin, serial data input on sda pin and serial data output on sdo pin. 3. sen pin low disabled the port, placing sdo in tri- state. signal transitions on sck and sda are ignored. 4. sen pin high enables the port for operation. 5. sen and sms pins low is a hardware reset for the part. these pins must be held low for at least 100 ns. 6. serial synchronization can be established by clocking in the minimum required ssr string of ffh, ffh, feh. more than two bytes of ffh may be input but the string must end with feh. commands serial port commands the majority of the Z86129/130/131 commands are common to both the i 2 c and spi modes. in the i 2 c mode, the commands must be contained within the start-slave address-etc. sequence. note: in the following command descriptions, the letter 'h' following a command code designates hexadecimal notation. reset reset = fbh, fch, 00h. reset is a three byte command sequence in spi or i 2 c mode. the reset command will establish all the specified default settings in the device, but it will not reset the serial port itself. this sequence can be entered without rdy being set. no operation nop = 00h. nop is a one-byte command for use in spi or i 2 c mode. the nop command does not affect the status of the rdy bit in the serial status (ss) register and can be executed independent of the rdy status. serial sync bytes ssb = ffh,....,ffh,feh. serial sync bytes are used in spi mode only. this command actually consists of a string of single-byte commands in the form ffh,....ffh,feh. spi mode communications can be synchronized by sending a synchronizing data string to the part. this string should consist of at least two ssb bytes of ffh followed by one ssb byte of feh. at the end of the feh byte the port is ready for use. caption/text display mode commands cptx = 10h-1fh. caption and text display mode commands. these commands select the desired line 21 data stream (closed caption or text) for display. caption and text display commands are one byte commands. a data channel can be selected for display with the display either enabled (dec on) or disabled (dec off). all these commands will turn off an active xds display mode. table 9 summarizes the device? table 8. basic serial commands serial command command code notes reset fbh, fch, 00h spi or i 2 c nop 00h spi or i 2 c ssb ffh,...ffh,feh spi mode only figure 12. cptx-caption/text display (cptx = 10h-1fh) bit 0 r/w r/w r/w 0 cm7 cm6 cm5 cm4 cm3 cm2 cm1 cm0 1 lang cptx donof r/w r/w r/w r/w r/w fld 0
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 24 ds96tel0200 commands (continued) caption and text display modes and the proper command code to activate them: xds display mode and 16 second erase timer commands xds disp = 20h-27h. xds display commands are one byte commands. these commands control the selection of xds display modes and the state of the 16 second erase timer. the 16 second erase timer is active only for caption and xds display modes. the 16 second erase timer has no affect on text mode displays read and write commands read selects. there are two read select commands (rds1 and rds2) in the Z86129/130/131. each command is one byte in size and indicates that a read should take place. rds1 specifies that one byte will be read from the Z86129/130/131. likewise, rds2 indicates that two bytes will be read. rds1 = 40h-47h. rds1 is a one-byte command used to initiate a one-byte read sequence by moving the contents of the register identified by the address field (ad00:02) of the command to the output register. addresses 0h-7h are valid in the rds1 command field ad00:02. rds2 = 60h-66h. rds2 is a one byte command which is used to initiate a two byte read sequence by moving the contents of the two consecutive registers, starting with the one identified by the address portion of the command (ad00:ad02), to the output registers and setting the rd2 bit in the ss register. only addresses 0h-6h are valid in the rds2 command field ad00:02. note: for xds data recovery, when the xds filter register (see internal register section) is enabled for the desired packets, the Z86129/130/131 will automatically establish the two byte recovery mode and move the recovered data bytes to the output register. table 9. caption and display commands cptx cptx command code command decoder on decoder off cc1 17h 16h cc2 15h 14h cc3 1fh 1eh cc4 1dh 1ch t1 13h 12h t2 11h 10h t3 1bh 1a t4 19h 18 table 10. xds display commands xds display xds display command code command 16 sec tmr on 16 sec tmr off xdsg 23h 27h xdsf 21h 25h 16 second erase timer 20h 24h note: changing the on/off state of the 16 second erase timer has no affect on the current display mode in operation. figure 13. rds1-read one byte (rds1 = 40h-47h) figure 14. rsd2-read two bytes (rds2 = 60h-66h) bit 0 1 w w w 0 cm7 cm6 cm5 cm4 cm3 cm2 cm1 cm0 0 ad02 ad01 ad00 ww w w w 0 bit 0 1 w ww 1 7 6 5 4 3 21 0 0 ad02 ad01 ad00 ww w w w 0
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 25 1 reading data from the Z86129/130/131 read1 = f8h: command to read one byte in the spi mode. read2 = f9h: command to read two bytes in the spi mode. the readx commands do not affect the status of the rdy bit in the serial status (ss) register and can be executed independent of the rdy status. in both serial communications modes, the dav bit in the ss register indicates when data is available. when the rd2 bit is low, dav is cleared on the rising edge of sck at the lsb of the first data byte. when the rd2 bit is high, dav is cleared on the rising edge of sck at the lsb of the second data byte. the rd2 bit is only valid if dav is high. reading in the i 2 c mode is selected by the r/nw bit in the slave address byte. the first byte after the slave address byte will be ss followed by the data in output buffers a and b in that order. if the instruction being executed is a one- byte read, then buffer a contains the read data and buffer b contains all ones. writing to the Z86129/130/131 wrxx = c0h-dfh the write commands require two bytes to execute. the first byte is the write command and includes the Z86129 register address (ad00:04) being written. the second byte will be the data to be written. osd display mode commands osd commands are one and two byte commands. they are used to control the loading of data for osd display and their presentation to the screen. normally osd display mode uses 15 tv lines per display row to enhance the screen appearance. the following tables summarize the single- and two-byte control commands for the Z86129/130/131 on-screen display. figure 15. readx-read x bytes (read1/2 = f8h/f9h) bit 1 1 w ww 1 7 6 5 4 3 21 0 1 0 0 rd2 w w w w w 1 figure 16. wrxx-write register xx (wrx = c0h-dfh) bit 1 1 w ww 0 7 6 5 4 3 21 0 ad02 ad01 ad00 ww w w w ad03 ad04 table 11. single-byte osd display mode commands (Z86129 only) command name code command function return 30h carriage return for osd when in textset mode clre 31h osd equivalent of delete to end of row (der) textset 32h establishes a text type of osd display popset 33h establishes a pop-on type of osd display flip 36h osd equivalent of pop-on caption end of caption (eoc) oedm 37h osd equivalent of erase displayed memory oenm 38h osd equivalent of erase non-displayed memory
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 26 ds96tel0200 commands (continued) figure 17 shows the two different character sets, graphics or extended, that share the address space c0h-ffh. the graphics character set is in force when the osd display is in drop shadow mode (the default condition). the two-byte commands graphics and extended above can be used to switch from the graphics characters to the extended characters and vice versa. an osd screen can only use one set at a time. table 12. two-byte osd display mode commands (Z86129 only) command name first byte second byte command function pop row sel (with double high option) a0h rrh sets display row and moves cursor to char column 1. the low order nibble of rr designates the display row. bit 5 of rr specifies a double high row. for example: rr = 0eh would select display row 14. rr = 23h would select display row three, double high. phys row sel a1h rrh sets the physical row, where the low order nibble of rr designates the physical row. rr can be any value from 00h to 0fh. cursor set a2h cch places the cursor at the character column position designated by cc, which can be any value from 00h to 20h (column 0-32). zero is the pac space. write char a3h ddh writes the data byte dd to the current cursor location and then increments the cursor. write map a4h rrh maps the current physical row to the display row designated by the low nibble of the rr byte. bit 4 of rr = 1 enables display of the row. bit 5 of rr = 1 indicates a double high row. write char dbl wide a5h ddh same as a3 command but specifies a double wide character. wait a6h nnh sets the rdy bit of ss and then suspends serial command execution for approximately the number of frames designated by the nn byte.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 27 1 figure 17. Z86129 graphics or extended character set
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 28 ds96tel0200 internal registers information controlling the setup and operation of the Z86129/130/131 are maintained in several registers. the user may read or alter the contents of these registers as required. serial status (ss) register address = not rqd. d 0 -lock. active high, indicating that the internal sync circuits are locked. may be used as an indication of the presence of a video signal. d 1 -fld. signals the current video field. low = field 2, high = field 1. d 2 -rovr. active high, indicating that the data available in the output buffer has not been read out and new data has been written over it. d 3 -intr. active high, indicating that an interrupt other than dav is pending. d 4 -wovr. active high, indicating a serial input data overrun. d 5 -rd2. signals the number of bytes available for output. low = 1 byte, high = 2 bytes. d 6 -dav. active high, indicating that data is available to be read out. d 7 -rdy. active high, indicating that the port input buffer is empty. only the nop, reset and read instructions may be sent if rdy is low. configuration register address = 00h. d 0 -tvs. selects the television standard. high selects pal and low selects ntsc. the default is ntsc. when pal is selected the display defaults to 15 tv scan lines per display row. d 1 -mono. selects monochrome operation. active high, indicating that character luminance will be output on all three color pins (rgb). the default is low, selecting color operation. d 2 -hlk. selects the horizontal signal source to be used to lock the vco: low = internal, high = hin. the default is internal. d 3 -vlk. selects the vertical signal source to be used to establish vertical sync lock: low = internal, high = vin. the default is internal. when internal lock is enabled the vin/intro pin will default to the intro output mode. interrupts should not be selected in the interrupt mask register if vlk mode is used. d 4 -d 7 . reserved display register address = 01h d 0 -tdrp. selects drop shadow or full box in text mode: high = drop shadow and low = box. the default is low. d 1 -t15. selects the number of tv lines per character row in a text display: high = 15 lines/row and low = 13 lines/row. the default is low. d 2 -tenh. enables enhanced attributes for a text display: high = disabled, low = enabled. the default is low. d 3 -cdrp. selects drop shadow or full box in caption mode: high = drop shadow and low = box. the default is low. d 4 -c15. selects the number of tv lines per character row in a caption display: high = 15 lines/row and low = 13 lines/row. the default is low. d 5 -cenh. enables enhanced attributes for a caption display: high = disabled, low = enabled. the default is low. note: osd and xds display modes always have enhanced attributes enabled. figure 18. serial status register (address not required) figure 19. con?uration register (address = 00h) bit rdy dav r rr rd2 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 wovr rovr fld lock rr r r r intr bit tvs mono r/w r/w r/w hlk d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 vlk r/w res res res res figure 20. display register (address = 01h) bit cdrp tenh r/w r/w r/w t15 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 tdrp r/w o15 odrp cenh c15 r/w r/w r/w r/w
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 29 1 d 6 -odrp. selects drop shadow or full box in the osd and xds display modes: high = drop shadow and low = box. the default is high. d 7 -o15. selects the number of tv lines per character row in the osd and xds display modes: high = 15 lines/row and low = 13 lines/row. the default is high. h position register address = 02h d 0 -d 5 -h 0 -h 5 . used to set the horizontal timing of the display. the default value in this register is 26h. each count change represents an incremental timing change of 330 ns. decreasing the value of this field moves the display to the right. conversely, increasing the value of this field moves the display to the left. d 6 -hpo. set the polarity to be used for locking to the hin signal when in the ext hlk mode: low = rising edge, high = falling edge. the default is low. d 7 -blubx. designates color of box: high = blue box and low = black box. the default is low. text position register address = 03h d 0 -d 3 -x 0 -x 3 . sets the number of rows in the text display. the default is 15 rows. d 4 -d 7 -y 0 -y 3 . sets the base row of the text display. the default value in this register is set to ffh, which produces a 15-row display with base row 15. entering a new value in this register can alter the size and placement of the text display. for example, to produce an 8 row text display with a base row of 12, this register should be set to c8h. if the value of the x and y bits result in a display where text rows are off the top of the screen, then the first row of the text display will start in row 1 and have the number of rows determined by the x value. line 21 activity register address = 04h d 0 -sch. indicates data being processed in the data channel selected for display. will become inactive if no data is received for the selected channel within the previous 16 seconds: high = active, low = inactive. the reset state is low. d 1 -xds. indicates xds data is being processed. will become inactive if no xds data is received within the previous 16 seconds: high = active, low = inactive. the reset state is low. d 2 -d 7 . reserved. xds filter register address = 05h d 0 -curr. selects current class packets for output through the serial control port when xds recovery has been enabled. d 1 -futr. selects future class packets for output through the serial control port when xds recovery has been enabled. d 2 -chan. selects channel information class packets for output through the serial control port when xds recovery has been enabled. d 3 -misc. selects miscellaneous class packets for output through the serial control port when xds recovery has been enabled. d 4 -publ. selects public service class packets for output through the serial control port when xds recovery has been enabled. figure 21. h position register (address = 02h) figure 22. text position register (address = 03h) bit h 3 h 2 r/w r/w r/w h 1 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 h 0 r/w blubx hpo h 5 h 4 r/w r/w r/w r/w bit x 3 x 2 r/w r/w r/w x 1 x 0 r/w y 3 y 2 y 1 y 0 r/w r/w r/w r/w d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 figure 23. line 21 activity register (address = 04h) figure 24. xds filter register (address = 05h) bit sch xds rr res res res res res res d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 bit r/w r/w r/w d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 r/w r/w r/w r/w r/w misc chan futr curr s 2 s 1 s 0 publ
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 30 ds96tel0200 internal registers (continued) d 5 -d 7 -s 0 -s 2 . selects a set of secondary parameters, tabulated below, to be used in filtering the xds data when xds recovery has been enabled. interrupt request register address = 06h d 0 -res. reserved. d 1 -dle. active high, indicating that the data line has ended. this bit will clear in each field a few lines after row 15. d 2 -eof. active high, indicating that the video signal is currently at the end of a field. this bit will clear in each field a few lines after row 15. d 3 -dlok. active high, indicating that the state of the lock signal has changed. the ss register must be read to determine the current state. d 4 -dsch. active high, indicating that a change in selected channel activity has occurred. the line 21 activity register must be read in order to determine if the selected data channel is active. d 5 -dxds. active high, indicating that a change in xds activity has occurred. the line 21 activity register must be read to determine if xds data is active. d 6 -dcap. active high, indicating that a change in a caption data channel activity has occurred. the caption activity register (address 08h) must be read to determine exactly which caption channels are now active. d 7 -dtxt. active high, indicating that a change in a text data channel activity has occurred. the caption activity register (address 08h) must be read to determine exactly which text channels are now active. note: except as noted for the case of d1 and d2 above, the master device must write a 1 to the appropriate bit in the interrupt request register to clear the interrupt. writing a 1 to any valid bit position the interrupt request register is equivalent to clearing a interrupt request on that bit. interrupt mask register address = 07h this register identifies which activities in the interrupt request register will be used to cause an interrupt. setting a bit to a 1 enables the interrupt when the corresponding event becomes active. setting all bits of this register to zero disables interrupts. table 13. xds secondary filter settings secondary filter filter value (s0:s2) all 0h time information 1h in band only 2h program rating (note #4) 3h vcr information 4h reserved 5h reserved 6h reserved 7h notes: 1. setting this register to 00h turns xds data recovery off. setting bits d 0 through d 4 enables xds data recovery for the classes selected as qualified by the secondary filter (bits d 5 -d 7 ). if bits d 0 -d 4 are all set to 1, all classes of xds data will be output (even reserved and undefined). 2. the time information only selection includes the time of day (tod) and local time zone (ltz) packets. 3. vcr information will select tod, ltz, net id, local call letters, impulse capture, tape delay, composite 2 and out of band channel number packets for recovery. 4. program rating filter available on Z86129 and z86130 only. figure 25. interrupt request register (address = 06h) bit r r r d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 r/w r/w r/w r/w r/w dlok eof dle res dtxt dcap dxds dsch figure 26. interrupt mask register address = 07h bit r/w r/w r/w d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 r/w r/w r/w r/w r/w dlok eof dle dav dtxt dcap dxds dsch
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 31 1 caption activity register address = 08h d 0 -d 7 - activity bits. activity bits for line 21 data channels cc1-t4. each bit will be set high when a mode setting command for its data channel has been received on line 21. the bit will be cleared to the low state if no activity is detected in that data channel during the next 12-16 seconds or if there is a loss of lock. xds data recovery the Z86129/130/131 is able to recover extended data services (xds) information from the input video signal. this data, formatted according to eia-608, can contain a wide variety of information about current and future programs, the channel currently tuned, other channels and miscellaneous data including time of day. xds data is only present in the even field. the Z86129/130/131 can recover xds data even while performing its normal caption decoder or osd functions. xds data packets are tagged according to a class/type system defined by eia-608. the Z86129/130/131 can be programmed to filter the xds data stream to extract only the classes of interest to the application. an additional level of filtering is provided that permits selection of certain groups of packets that are of use in specific applications. xds filtering reduces the traffic on the serial bus, reduces the load of the tv/vcr control processor and simplifies external xds decoding. xds data recovery is enabled by selecting one or more classes in the xds filter register. optionally, a secondary filter code can be specified which further limits the packets to be recovered. once xds recovery is enabled filtered data pairs will be loaded into the serial output registers of the Z86129/130/131 immediately upon receipt and in the order received. the dav and rd2 bits of the serial status (ss) register will then go high, indicating the availability of two output bytes. the external tv control processor does not need to send a read select command in order to read these data bytes. when the xds filter register is set to 00h (the default state) xds recovery is disabled. caution: when xds data recovery is enabled, the external controller should never perform any other read operation, except ss reads, in the beginning of field 2. this is most easily accomplished by using the end of field (eof) or data line end (dle) interrupt to locate the end of field 2 or the vertical blanking interval (vbi) of field 1, and then perform the read select and read functions during this portion of the video frame. commands other than read selects will not interfere with xds data recovery regardless of their position in the video frame. some examples of Z86129/130/131 write commands that could be used to set the xds filter register are shown below. the xds filter register bit assignments are defined in the Z86129 internal register section of this specification. filtered xds data format filtered xds data is output from the Z86129/130/131 in the order it is received on line 21. in other words, think of the Z86129/130/131 xds filter function as creating a new, smaller stream of xds data packets. this new data stream will look exactly as though the class and type specified in the xds filter register (05h) are the only data encoded on line21 of field 2. the filtered data output from the Z86129/130/131 will be in full compliance with eia-608 specifications for xds data streams; headers and control codes intact. see note paragraph below for a special exception to this rule. figure 27. caption activity register (address = 08h) bit r r r d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 r r rr r cc4 cc3 cc2 cc1 t4 t3 t2 t1 table 14. xds data extraction - example filter settings {write cmd, filter code} xds filter output {c5,41} all in band, current class packets recovered. {c5,61} program rating, current class packets recovered note: this filter may be used for v-chip data packet recovery (Z86129 and z86130 only). {c5,1f} all xds packets recovered. {c5,01} all current class packets recovered. {c5,28} time information recovered. this filter will extract the time of day (tod) and local time zone (ltz) packets from the miscellaneous class data. note: this filter may be used to implement auto clock-setting in tvs, and vcrs {c5,9f} vcr information recovered. will select tod, ltz, net id, local call letters, impulse capture, tape delay, composite 2 and out of band channel number packets for recovery.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 32 ds96tel0200 internal registers (continued) xds data and header information (including start, continue, and end commands) are passed through the filter for the xds class and type specified in the xds filter register. all other line 21 data is filtered out and will not be output, or used to generate a data available flag (dav) in the serial status register. to properly read filtered xds data from the Z86129/130/131, the master device must first write the xds filter register (05h) with its desired xds class and type information. for example, in order to extract only the line 21 program rating information, the master must write the value 61h to the xds filter register. the master should then poll the state of the dav bit in the ssr until dav = 1. as soon as dav=1, the master may initiate a 3-byte read in the normal manner (xds data bytes always arrive in pairs, so it is safe to assume that rd2=1 when dav=1 in the ssb). a 3-byte read always yields two data bytes, which in this case will be the first two bytes of the current class, program rating type xds data stream encountered on line21 field 2. the master device must then interpret those two bytes according to eia-608 specifications for current class, program rating type data. refer to eia-608 for data formats. the xds filters on the Z86129/130/131 greatly reduce the amount of field 2 data passed on to the master device for further processing and interpretation. however, the master device must still interpret the filtered data stream in accordance with eia-608. the filtered data stream from the Z86129/130/131 will be in full compliance with eia- 608. in other words, the filtered data stream will contain all the xds command and data packets, in standard eia-608 format, but only for the selected xds class and type(s). note: the Z86129/130 xds filter for program rating information behaves differently than all other Z86129/130 predefined xds filters. this change has been made to minimize the amount of data passed through the program rating xds filter, thereby minimizing the interpretation and communications load on the master device. when the xds filter register is set to 61h (class=01h (current), type=05h (program rating) the only data from line 21 field 2 that will pass through the filter is: 1. program rating packet: [xxh,00h]. the current class program rating data byte pair as defined in eia-608. the program? rating is encoded per eia-608 in the byte xxh. 2. the end packet [0fh,chksum]. a two-byte packet that includes a chksum computed per eia-608. the checksum calculation includes the start packet [01h,05h] even though this value was not passed through the filter.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 33 1 Z86129 commands and register summary table 15. Z86129 summary of control commands cmd. name cmd. code function reset fbh,fch,00h reset is a three-byte command sequence in spi or i 2 c mode. the reset command will establish all the specified default settings in the device, but it will not reset the serial port itself. this sequence can be entered without rdy being set. nop 00h nop is a one-byte command for use in spi or i 2 c mode. the nop command does not affect the status of the rdy bit in the serial status (ss) register and can be executed independent of the rdy status. ssb ffh,...fh,feh serial sync bytes are used in spi mode only. this command actually consists of a string of single-byte commands in the form ffh,....ffh,feh. spi mode communications can be synchronized by sending a synchronizing data string to the part. this string should consist of at least two ssb bytes of ffh followed by one ssb byte of feh. at the end of the feh byte the port is ready for use cptx 10h-1fh selects a closed caption (cc1-cc4) or text (t1-t4) data channel for processing or display disp 20h-28h selects a preprogrammed xds screen template for display, with or without 16 second erase timer enabled rds1 40h-47h rds1 is a one-byte command used to initiate a one byte read sequence by moving the contents of the register identified by the address field (ad00:02) of the command to the output register. addresses 0h-7h are valid in the rds1 command field ad00:02. rds2 60h-66h rds2 is a one-byte command which is used to initiate a two-byte read sequence by moving the contents of the two consecutive registers, starting with the one identified by the address portion of the command (ad00:ad02), to the output registers and setting the rd2 bit in the ss register. only addresses 0h-6h are valid in the rds2 command field ad00:02. read1 f8h command to read one byte in the spi mode. read2 f9h command to read two bytes in the spi mode. wrxx c0h-dfh, xxh the write commands require two bytes to execute. the first byte is the write command and includes the Z86129 register address (ad00:04) being written. the second byte (xxh) will be the data to be written.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 34 ds96tel0200 Z86129 commands and register summary (continued) table 16. Z86129 osd display mode commands cmd. name cmd. code function return 30h carriage return for osd when in textset mode clre 31h osd equivalent of delete to end of row (der) textset 32h establishes a text type of osd display popset 33h establishes a pop-on type of osd display flip 36h osd equivalent of pop-on caption end of caption (eoc) oedm 37h osd equivalent of erase displayed memory oenm 38h osd equivalent of erase non-displayed memory pop row sel (with double high option) a0h,rrh sets display row and moves cursor to char column 1. the low order nibble of rr designates the display row. bit 5 of rr specifies a double high row. for example: rr = 0eh would select display row 14. rr = 23h would select display row three, double high. phys row sel a1h,rrh sets the physical row, where the low order nibble of rr designates the physical row. rr can be any value from 00h to 0fh. cursor set a2h,cch places the cursor at the character column position designated by cc, which can be any value from 00h to 20h (column 0-32). zero is the pac space. write char a3h,ddh writes the data byte dd to the current cursor location and then increments the cursor. write map a4h,rrh maps the current physical row to the display row designated by the low nibble of the rr byte. bit 4 of rr = 1 enables display of the row. bit 5 of rr = 1 indicates a double high row. write char dbl wide a5h,ddh same as a3 command but specifies a double wide character. wait a6h,nnh sets the rdy bit of ss and then suspends serial command execution for approximately the number of frames designated by the nn byte. graphics 84h,30h sets the graphics character set in force. extended 8ch, 30h sets the extended character set in force. table 17. summary of Z86129/130/131 internal registers register name address d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 serial status register (ssr) none rdy dav rd2 wovr intr rovr fld lock con?uration 00h res res res res vlk hlk mono tvs display 01h o15 odrp cenh c15 cdrp tenh t15 tdrp h position 02h blubx hpo h 5 h 4 h 3 h 2 h 1 h 0 text position 03h y 3 y 2 y 1 y 0 x 3 x 2 x 1 x 0 line 21 activity 04h res res res res res res xds sch xds filter 05h s 2 s 1 s 0 publ misc chan futr curr interrupt request 06h dtxt dcap dxds dsch dlok eof dle res interrupt mask 07h dtxt dcap dxds dsch dlok eof dle dav caption activity 08h t4 t3 t2 t1 cc4 cc3 cc2 cc1
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 35 1 on-screen display (Z86129 only) osd operation the Z86129 has a fully programmable, general purpose osd built in. the user can supply information for display through the serial port. in addition to all the normal and extended features of the vbi data display modes, osd mode also has available added graphics characters, double high and double wide characters and the ability to position the display anywhere on the screen with an adjustable (vertical) box size. the double-high and double- wide characters are especially useful for creating osd screens for display inside a picture-in-picture (pip) window. the osd display mode can use either 13 or 15 lines per row, with box or drop shadow. the default is 15 scan lines per row and drop shadow. enhanced attributes are always enabled. the 15 scan line per row display can only show 13 rows on screen when in the ntsc mode. rows 14 and 15 will be off screen and should not be addressed. in the pal mode all rows will be visible. the 15 scan lines per row mode display can show the full graphic characters and accented capital letters and descenders without the potential overlap that would result from the 13 scan line per row display. if the osd display mode is changed to a 13 scan line per row mode, the top two scan lines of any graphics or accented capital letter will be ?red?together with the bottom two scan lines from the row above. in 13 line-drop shadow mode this will also result in a side shadow effect. graphics characters should not be used in the 13 line-drop shadow mode. osd character set there are 256 possible addresses in the osd character set. figure 28 shows the address map in the range 00h- bfh. this portion of the addressable space contains the control bytes and regular character set. the address map in the range c0h-ffh is shown in figure 17. these addresses are shared by the extended character set and the graphics character set. any particular osd screen can use one or the other of these sets of characters but not both. the character set in force is controlled by the type of display mode being invoked. when drop shadow is being used, by default, the graphics character set will be displayed in response to an address in the c0h-ffh range. however, if a box display is used, the extended character set is invoked. in either case the user can switch to the other set by means of the appropriate command, graphics or extended. the vin/intro pin serves as the input for a vertical pulse from the tv receiver when v lock = vin mode is enabled. this permits an osd display even when no video input is present. if this mode is not required the default state v lock = video should be active and this pin will then carry the intro output signal. osd commands osd commands are one and two byte commands. they are used to control the loading of data for osd display and their presentation to the screen. normally osd display mode uses 15 tv lines per display row to enhance the osd presentation. the two byte commands enable direct access to any location on the display screen. the user may construct displays of his own choosing by using these commands. each command byte pair consists of an instruction byte followed by a data byte. (see the sample Z86129 osd programs below.)
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 36 ds96tel0200 on-screen display (Z86129 only) (continued) figure 28. osd character set
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 37 1 note: in this product specification one and two byte commands are written as one or two, two-digit hex values, separated by a comma, within curly braces. for example, the write char command for entering the letter a as a single width character would be shown in this document as {a3,41}. this command would write the letter a to the current cursor position of the display row being addressed. refer to serial communications interface and commands sections for further details of the serial communications and the osd commands. the one byte commands provide a simple means of creating osd displays using preset screen formats built into the part. these built-in modes provide the user with a simple way to generate osd screens. two preset display modes are available called popset and textset. using popset popset provides an osd mode that operates in a fashion similar to the caption pop-on mode. the popset command organizes the memory into two eight row blocks, one visible on screen and the other off screen. an osd screen can then be created by loading the off screen memory by the command sequence pop row sel, write char .. write char .. pop row sel .. write char .. write char. the data can then be presented for on-screen display with the flip command. the following is an example of a command sequence that will create an osd screen using the popset mode. it creates a typical menu screen used in television receivers. it should be noted that in this document commands are written as either a one, or two byte hex value, separated by a comma, within curly braces (i.e., a sample two-byte osd command: {a1,00}). note: in the sample program below, a comment field is written following the command to describe the action of the command or sequence of commands, where appropriate. the comment field is identified by an asterisk (*) and any text following the * will be taken as a ?omment?in the examples that follow. sample osd program osd commands function {33} *select pop mode. sets up the Z86129 internal memory organization to support pop mode. the ?st block of cmds will display > video in double wide chars. each character is entered with the write chard cmd. {a0,02} *select poprow 2, cursor at character column1 {a2,00} *move cursor to 0 {a3,08} *pac for red chars written in pac location. {a5,3e} *double wide char ? will display in char col 1 & 2 {a3,02} *green mid code written to char col 3 {a5,56} *"v" written to char col 4 & 5. {a5,49} *"i" {a5,44} *"d" {a5,45} *"e" {a5,4f} *"o" *the next block of cmds will display audio in row 4 double width. {a0,04} *select poprow 4, cursor in char col 1 {a2,03} *cursor to char col 3 {a3,02} *green mid code written to char col 3 {a5,41} *"a" written to char col 4 & 5. {a5,55} *"u" [a5,44] *"d" [a5,49] *"i" notes: *the next set of commands will display the word ?ime?in row 6 with double-wide characters. spacing is obtained without the a2 cursor set command to illustrate an alternate means of col- umn alignment.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 38 ds96tel0200 on-screen display (Z86129 only) (continued) . osd command function {a0,06} * select poprow 6, cursor in char col 1 {a3,02} * green mid code written to character column 1 {a5,20} * double wide space char written to character columns 2 & 3 {a5,54} * "t" written to char col 4 & 5. {a5,49} * "i" {a5,4d} * "m" {a5,45} * "e" note: * set up will be displayed in row 8 using double-wide chars. osd command function {a0,08} *select poprow 8 {a2,03} * cursor to 3 {a3,02} *green characters {a5,53} * "s" {a5,45} * "e" {a5,54} * "t" {a5,20} * " " {a5,55} * "u" {a5,50} * "p" note: * closed caption displayed in row 10 using double- wide characters. the last letter, n, will appear in character col- umn 30 and 31 osd command function {a0,0a} * select poprow a {a2,03} * cursor to 3 {a3,02} * green char {a5,43} * "c" {a5,4c} * "l" {a5,4f} * "o" {a5,53} * "s" note: * the line, select: enter exit: menu, will appear in row 12, starting in character column 2. these will be displayed as single-wide characters {a5,45} * "e" {a5,44} * "d" {a5,20} * " " {a5,43} * "c" {a5,41} *"a" {a5,50} * "p" {a5,54} * "t" {a5,49} * "i" {a5,4f} * "o" [a5,4e] * "n" osd command function {a0,0c} * select poprow c {a3,06} * cyan char {a3,53} * "s" {a3,65} * "e" {a3,6c} * "l" {a3,65} * "e" {a3,63} * "c" {a3,74} * "t" {a3,3a} * ":" {a3,20} * " " {a3,45} * "e" {a3,4e} * "n" {a3,54} * "t" {a3,45} * "e" {a3,52} * "r" {a3,20} * " " {a3,20} * " " {a3,45} * "e" {a3,78} * "x" {a3,69} * "i" {a3,74} * "t" {a3,3a} * ":" {a3,20} * " " {a3,4d} * "m" {a3,45} * "e" {a3,4e} * "n" {a3,55} * "u" {36} * flip cmd. will flip memories, popping the full menu on screen. osd command function note: * the line, select: enter exit: menu, will appear in row 12, starting in character column 2. these will be displayed as single-wide characters
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 39 1 using textset textset features an osd mode that will paint on the screen in a manner similar to a text mode display. the memory will be organized using the current information in the text position register and the display will follow the current setting in the display register. the default display parameters for osd are 15 lines per row, drop shadow mode. the textset command can be followed by successive write char commands interspersed with the return command at the appropriate points to paint on an osd display starting at the top of the text window as set by the text position register and moving to the next line at each return command. the display will scroll if a return command is sent when at the bottom of the text window. a subsequent textset command will clear the screen and generate a new osd screen. the following example shows an osd display generated using textset. this screen will paint on rather than pop on. features like flash are included in the command sequence for demonstration purposes. * the text display is first set to 4 rows at the bottom of the screen. osd command function {c3,d4} * set textpos reg for base row 13, 4 rows {c1,80} * set osd display for box mode, 15 lines/row {c2,a6} * set box to blue, keep hpos unchanged {32} * select textset mode * the next two cmds are used for positioning and color. {a2,05} * cursor to char pos 5 {a3,08} * mid code to make red chars. cursor moves to 6 {a3,b9} * mid code to start flash, cursor moves to 7 {a5,57} * 'w' double wide, char col 7,8 {a5,41} * 'a' double wide, char col 9,10 {a5,52} * 'r' double wide, char col 11,12 {a5,4e} * 'n' double wide, char col 13,14 {a5,49} * 'i' double wide, char col 15,16 {a5,4e} * 'n' double wide, char col 17,18 {a5,47} * 'g' double wide, char col 19,20 {a5,20} * ' ' double wide, char col 21,22 {30} * return moves cursor to next row, char pos 1 {a2,00} * cursor to char pos 0 {a3,0a} * pac sets color to yellow, cursor moves to char pos 1 {a3,54} * 't' single width, cursor moves to char pos 2 {a3,68} * 'h' {a3,65} * 'e' {a3,72} * 'r' {a3,65} * 'e' {a3,20} * ' ' {a3,69} * 'i' {a3,73} * 's' {a3,20} * ' ' {a3,61} * 'a' {a3,20} * ' ' {a3,74} * 't' {a3,6f} * 'o' {a3,72} * 'r' {a3,6e} * 'n' {a3,61} * 'a' {a3,64} * 'd' {a3,6f} *'o' {a3,20} *' ' {a3,69} *'i' {a3,6e} *'n' {a3,20} *' ' {a3,74} *'t' {a3,68} *'h' {a3,65} *'e' {a3,20} *' ' {a3,61} *'a' {a3,72} *'r' {a3,65} *'e' {a3,61} *'a' {a3,2e} *'.' {30} * return moves cursor to next row, char pos 1 {a3,50} *'p' {a3,6c} *'l' {a3,65} *'e' {a3,61} *'a' {a3,73} *'s' {a3,65} *'e' {a3,20} *' ' {a3,74} *'t' {a3,61} *'a' {a3,6b} *'k' {a3,65} *'e' osd command function
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 40 ds96tel0200 on-screen display (Z86129 only) (continued) * at this point all 4 rows are on screen. the following wait command will hold the display for a period = (12x16)/30 seconds. {a6,c0}* wait for 6.4 seconds. * create a smooth scroll to clear the screen with the following 4 row sequence. * create a new screen display {a3,20} *' ' {a3,61} *'a' {a3,6c} *'l' {a3,6c} *'l' {a3,20} *' ' {a3,6e} *'n' {a3,65} *'e' {a3,63} *'c' {a3,65} *'e' {a3,73} *'s' {a3,73} *'s' {a3,61} *'a' {a3,72} *'r' {a3,79} *'y' {30} * {a3,70} *'p' {a3,72} *'r' {a3,65} *'e' {a3,63} *'c' {a3,61} *'a' {a3,75} *'u' {a3,74} *'t' {a3,69} *'i' {a3,6f} *'o' {a3,6e} *'n' {a3,73} *'s' {a3,20} *' ' {a3,69} *'i' {a3,6d} *'m' {a3,6d} *'m' {a3,65} *'e' {a3,64} *'d' {a3,69} *'i' {a3,61} *'a' {a3,74} *'t' {a3,65} *'e' {a3,6c} *'l' {a3,79} *'y' {a3,2e} *'.'. osd command function osd command function {30} *return, ?st row. {a6,0f} *wait 15 frames {30} *return second row. {a6,0f} {30} *return third row. {a6,0f} {30} *return fourth row. {a6,0f} osd command function {a3,74} *'t' {a3,68} *'h' {a3,69} *'i' {a3,73} *'s' {a3,20} *' ' {a3,77} *'w' {a3,61} *'a' {a3,73} *'s' {a3,20} *' ' {a3,6f} *'o' {a3,6e} *'n' {a3,6c} *'l' {a3,79} *'y' {a3,20} *' ' {a3,61} *'a' {a3,20} *' ' {a3,74} *'t' {a3,65} *'e' {a3,73} *'s' {a3,74} *'t' {30} *return {a3,64} *'d' {a3,6f} *'o'
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 41 1 using the wait command the wait command will suspend serial port communications for a period of time. the textset example above used the wait command in two ways. first to hold a display on screen for a period of time before taking a second action. then it was used to create a smooth scroll by timing the wait to the scroll rate. the wait command can also be used to control the appearance of two osd displays in sequence without tying up the master device for the total display time. in the following example, the popset mode is used to pop on two sequential menu screens with a built-in pause between the two displays. in this case the wait is placed just before the last flip command. this allows the entire command sequence to be sent to the Z86129 at once, since the rdy bit will be set by the wait command, thus allowing the flip to be input as well. the command sequence would be as follows: * flip cmd. will flip memories, popping the second menu on screen. using the graphics character set the following example creates an osd screen which illustrates several features of the Z86129 including the use of the graphics character set to generate a large font word. the particular features shown are purely for demonstration purposes and not intended to suggest a particular application. for the sake of brevity, the "text" to be displayed will be shown as a string within quotes rather than as the actual command sequences required. single quotes, ', will signify standard characters while double quotes, ", will signify double wide characters. {a3,6e} *'n' {a3,27} *''' {a3,74} *'t' {a3,20} *' ' {a3,70} *'p' {a3,61} *'a' {a3,6e} *'n' {a3,69} *'i' {a3,63} *'c' {a3,2e} *'.' osd command function {33} *select pop mode { .. } *screen generation commands for ?st display { .. } { .. } {36} * flip command. will ?p memories, popping the ?st menu on screen. {38} * oenm, to ensure non-displayed memory is erased. { .. } * screen generation commands for second display { .. } { .. } {a6,c0} *wait 6 seconds {36} osd command function osd cmd code function {33} *select pop mode {a0,02} *select poprow 2 {a2,00} *move cursor to 0 {a3,03} * pac, green chars 'this is a demonstration of osd' {a0,03} * select poprow 3 {a2,00} * cursor to 0 {a3,08} * pac, red char 'the Z86129 has many features' {a0,04} *select poprow 4 {a2,00} * cursor to 0 {a3,04} * blue char 'besides displaying captions.' {a0,06} *select poprow 6 {a2,00} *move cursor to 0 {a3,07} * pac, cyan underlined 'color and underline may be used' {a0,08} *select poprow 8 {a2,00} *move cursor to 0 {a3,0a} * pac, yellow chars *" double wide" {a0,09} *select poprow 9 {a2,00} *move cursor to 0 {a3,0c} * pac, magenta chars
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 42 ds96tel0200 manual row mapping and control for most osd displays the popset, pop row sel, flip, textset and return commands should be used to control row positioning. textset mode provides automatic row allocation from top to bottom of the screen with all rows continuously visible. additionally, textset screens have a definable vertical window size and position and support automatic text scrolling at the bottom of the window. popset screens are created in off-screen memory while the previous screen is displaying. up to 8 rows of characters can be defined. these rows can be mapped to any of 15 display rows using the pop row sel command. double high rows may also be defined with pop row sel. the flip command is then used to "pop- on" up to 8 rows of characters replacing the previous screen. the off-screen rows may be mapped to the same row numbers as the on-screen rows. in some applications it may be necessary to access the display hardware at a lower level to achieve special screen effects. examples of these special situations include the following: 1. more than 8 on-screen rows required in a "pop-on" style screen 2. characters need to be added dynamically to an on- screen display 3. on-screen rows need to be dynamically moved, disabled or enabled the Z86129 supports manual screen mapping and display control commands to handle these special applications. these commands allow each of the 16 physical rows of character memory implemented in the device to be mapped to any of 15 display row positions. *'graphics can be created like' *the next group of cmds will use graphic char patterns to make the two row * word hello. the data byte of the write char cmd is the address * location for the graphic cell desired as shown in fig. 5. {a0,0b} *select poprow 11 {a2,00} *move cursor to 0 {a3,06} *pac, cyan chars {84,30} * set graphics mode in case another user had changed it earlier. {a5,20} * " " {a5,20} * " " {a5,20} * " " {a5,20} * " " {a3,20} * " " {a3,eb} * graphic cell {a3,ea} *graphic cell {a3,20} * " " {a3,fb} * graphic cell {a3,20} * " " {a3,ea} * graphic cell {a3,20} * " " {a3,ea} * graphic cell {a3,20} * " " {a3,fa} * graphic cell {a3,f5} * graphic cell {a0,0c} *select poprow 12 {a2,00} *move cursor to 0 {a3,06} *pac, cyan chars {a5,20} * " " {a5,20} * " " {a5,20} * " " {a5,20} * " " {a3,20} * " " {a3,ea} * graphic cell {a3,ea} * graphic cell {a3,20} * " " {a3,eb} * graphic cell osd cmd code function {a3,20} * " " {a3,eb} * graphic cell {a3,20} * " " {a3,eb} * graphic cell {a3,20} * " " {a3,eb} *graphic cell {a3,d7} * graphic cell * {36} * ?p * * osd cmd code function
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 43 1 additionally the 16 physical rows can be set for single or double height and independently enabled and disabled. manual row mapping and control commands should only be used in the popset osd mode. the procedure for manual row control is as follows: 1. use the popset command to select the osd pop-up mode. this command prepares the Z86129 for osd input, clears the row maps and erases character memory. 2. select a physical row (0 through 15) using the phy row sel command. 3. use the write map command to set the display row (1 through 15), double high bit, and enable bit of the selected physical row. the cursor set, write char and write chard commands are used to position the cursor and write the characters in the selected physical row. a physical row may be re-selected at any time to change its characters, row maps, double high mode or enable status. for example, it may be desirable to load several rows of characters into physical memory without enabling them. all of the rows could then be made to "pop" onto the screen all at once by setting their enable bits. the following example uses manual row mapping and control to write three rows of characters. the ?st row is a double high row that is enabled before the characters are sent. this allows the characters to "paint" onto the screen as they are received. the second and third row are not initially mapped or enabled when the characters are written. they are then mapped and enabled after a two second pause. a new row is then created off-screen to replace the third row. finally, after a 2 second pause the second row is moved to a new display row, the original third row is disabled and the new third row is mapped and enabled. osd command code function {33} *select popset mode {a1,00} *select physical row 0 {a4,31} * map it to display row 1, enable, double {a2,02} *cursor to 1 {a3,02} *green * double wide text *"the first row " {a1,01} *select physical row 1 {a2,00} *cursor to 0 {a3,0a} * yellow *single wide text '*these two rows are' {a1,07} *select prow 7 {a2,00} *cursor to 0 {a3,06} *cyan *single wide text '*enabled after a pause' {a6,40} *wait 2 seconds *do the map and enable {a1,01} *select physical row 1 {a4,16} {a4,16} *map it to display row 6, enable {a1,07} *select prow 7 {a4,17} *map it to drow 7, enable *prepare a new row to replace row 7 {a1,08} *select physical row 8 {a2,00} *cursor to 0 {a3,06} *cyan *single wide text '*moved after a pause'
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 44 ds96tel0200 demonstration programs communicating with the Z86129 communications with the Z86129 is accomplished using its serial communications interface. through hardware setup, this interface can be configured into either of two serial protocols, i 2 c or spi. the details of hardware setup have been provided in the serial communications interface section and will not be dealt with here. it is assumed that the user is familiar with the serial protocol requirements. note: in the following descriptions means press the enter key. an asterisk (*) signifies that everything following the asterisk in that line is a comment. i 2 c operation the Z86129 is configurable as an i 2 c slave device with the seven-bit slave address=14h. zilog can provide c language programs which enable a pc to perform as the i 2 c master device in an application. the pc communicates with the Z86129 through its parallel port. these programs are not intended as examples of how to program the application but are only provided as a means of illustrating the serial control process and the capability of the Z86129. the three programs available are titled iico, scripti and xdscap. these programs have been compiled and run satisfactorily with the Z86129 in a test board. compiled versions are available on disk. contact your local zilog sales office for further information on these programs. iico program this program will send one byte to the Z86129 without checking the status of the ready bit. the program returns the contents of the serial status (ss) register after the command has been entered. when the program is active the screen will display: iic command byte > the user may enter any valid one byte command such as fbh (reset) or 00h (nop) and then hit the enter key. the screen will then display the byte entered and the ss register contents as follows: iic byte = 00 iic status = 83h the text above shows the nop command was entered. the ss register contents, 83h, indicates that the rdy, fld and lock bits are high indicating that the serial port is ready for further input, that the input video signal was in field 1 at the time the status was read and that the part is operating in video lock mode. the iico program is exited by entering a control+c (^c) character. for example, entering the following single byte commands would: the commands that control most of the display capability of the Z86129 are all one byte commands which can be entered using the iico program. these commands are tabulated below for convenience. {a6,40} * wait 2 seconds *make the modi?d display {a1,01} *select physical row 1 {a4,1a} *map it to display row 10, enable, double {a1,07} *select prow 7 {a4,00} *disable it {a1,08} *select prow 8 {a4,1b} *map it to row 11,enable, double osd command code function fbh, fc00h, 00h reset the part. reset the part. 17h *set the part to cc1 display mode, decoder on. 23h *change to the xds graze display mode, 16 second timer on. 17h *return to the cc1 display mode, decoder on.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 45 1 general commands caption/text display mode commands cptx = 10h-1fh. caption and text display mode commands. these commands select the desired line 21 data stream (closed caption or text) for display. see the commands section for a complete description of the cptx display mode command. caption and text display commands are one byte commands. a data channel can be selected for display with the display either enabled (dec on) or disabled (dec off). all these commands will turn off an active xds display mode. the following table summarizes the device? caption and text display modes and the proper command code to activate them xds display mode and 16 second erase tim- er commands xds disp = 20h-27h. xds display commands are one byte commands. these commands control the selection of xds display modes and the state of the 16 second erase timer. the 16 second erase timer is active only for caption and xds display modes. the 16 second erase timer has no affect on text mode displays. scripti program this program is designed to send any number of one or two byte commands to the Z86129. the list of commands to be executed are contained in script files that have the extension.ser. examples of such files will be presented in the following paragraphs. scripti can be used to control the display modes in the same manner as the iico program except that the one byte command to be sent must be in a script file. for example a file called cc1.ser would contain the one byte command: {17}* send cc1, decoder on the program is invoked by typing: si file_name note: file_name without the .ser extension the screen will display: eeg ccd2 serial interface script player version x.xx slave address is 28h script file done the responding slave address is reported to the screen. when all the commands in the file have been successfully sent to the Z86129, the pc will return to the system prompt. the program checks the rdy status before sending each byte. if, during the entry of a command, the rdy bit is not found to be a "one" after an extended wait, the program will report the contents of the ss register and then continue checking for rdy. serial cmd cmd code reset fbh, fch, 00h nop 00h ssb ffh,...ffh,feh figure 29. cptx - caption/text display (cptx = 10h-1fh) cptx cptx command code command decoder on decoder off cc1 17h 16h cc2 15h 14h cc3 1fh 1eh cc4 1dh 1ch t1 13h 12h t2 11h 10h t3 1bh 1a t4 19h 18 bit 0 0 r/w r/w r/w 0 cm7 cm6 cm5 cm4 cm3 cm2 cm1 cm0 1 lang cptx donof r/w r/w r/w r/w r/w fld xds display xds display command code command 16 sec tmr on 16 sec tmr off xdsg 23h 27h xdsf 21h 25h 16 second erase timer 20h 24h note: changing the on/off state of the 16 second erase tim- er has no affect on the current display mode in operation.
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 46 ds96tel0200 demonstration programs (continued) script files script files can be generated to perform all of the setup and control functions required to use the part in an application. the script files shown below are examples of such files used to setup the Z86129 for different operating conditions. some of the files contain only a single command while others include several commands. the user should refer to the command and registers section for details. although the following examples are organized according to a particular register, some of the files contain information for several registers. configuration register script files display register script files h position register script files text position register script files xdscap program this program performs the application's task of xds data recovery. xds recovery must first have been enabled through the appropriate xds filter command. examples of script files for setting the xds filter register are shown below. the program is invoked by typing: xdscap when the program is invoked the pc screen will show: eeg ccd2 xds data recovery test program version x.xx slave address is 28h the responding slave address is reported to the screen. once communication is acknowledged the program will display all xds data recovered from those packets that were enabled through the xds filter command. for example: {01,03}current program{00}{0f,7f}....etc the ascii characters are shown as ascii characters while the non-printing characters are displayed by their hex value within curly braces. byte pairs, such as class,type, are shown as pairs within the curly braces, separated by a comma, i.e. {01,03}. file name cmd {xxh,yyh} comments figm {c0,02} * set con? to mono figvh {c7,00} * set int mask register clear {c0,0c} * set con? to ext vlk & hlk {83,12} * bit set ext v pulse for pos {c2,1d} * center h display fign {c0,00} * set con? back to default state {c2,26} *return h display to center figpal {c1,d2} *change display register to c15 & t15 {c3,ff} *change text pos register to base row 15, 15 rows {c0,01} *set con? register to tvs=1. changes vbi line to l22 pal. file name cmd {xxh,yyh} comments dn {c1,c0} * set display register to default conditions dt1 {c1,c1} * set display register to text drop shadow dt2 {c1,c2} * set display register to text 15 lines per row dt3 {c1,c3} *set display register to text drop shadow, 15 lines dt3a {c1,c3} * 15 tv lines and drop text {c3,dd} * 13 rows of text, base row 13 dce {c1,e0} * disable cap enhanced mode file name cmd {xxh,yyh} comments hposc {c2,26} * center box hposr {c2,1d} * move box right 2.97 m s (from center) hposl {c2,29} * move box left 0.99 m s (from center) hposcb {c2,a6} * center box & make box blue file name cmd {xxh,yyh} comments tpos15 {c3,ff} * text, base row 15, 15 rows tpos13 {c3,fd} * text base row 15, 13 rows tpos10 {c3,fa} * text base row 15, 10 rows tpos10a {c3,ba} * text base row 11, 10 rows
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 47 1 if no data is received within approximately 45 seconds, the program will time out, report "data not available", and exit the program. note: the xdscap program can also be exited by entering a control c (^c) character. xds filter register script files using interrupts interrupts involve the use of the line 21 activity register, the interrupt request register and the interrupt mask register. the Z86129 must be configured for vlk internal so that the vintro signal, pin 13 is an output providing the interrupt output signal. the interrupt status can be polled through bit d 3 of the serial status (ss) register if the interrupt signal cannot be used. interrupts are disabled when the interrupt mask register has been set to all zeros. conversely, interrupts are enabled by setting one or more of the active bits to a one. when enabled, the intro signal will become a one when the enabled mask event(s) becomes active. if more than one event has been activated, the interrupt request register must be queried to determine which event has occurred. the dle and eof interrupts will be cleared at the end of the field in which they occurred. interrupt mask register script files spi operation the serial port of the Z86129 may be configured to operate as an i 2 c or spi interface. the Z86129 always acts as the slave device with the master generating the required clock and input data signals. two c language programs available from zilog enable a pc to perform as the i 2 c or spi master device of an application. the pc communicates with the Z86129 through it's parallel port. these programs are not intended as examples of how to program the application but are only provided as a means of illustrating the serial control process. the two programs available, serout and script are the spi equivalent to the i 2 c programs iico and scripti, respectively. these programs have been compiled and run satisfactorily with the Z86129 in a test board. compiled versions are available on disk. serout program this program will send one byte to the Z86129 without checking the status of the ready bit. the program returns the contents of the serial status (ss) register after the command has been entered. when the program is active the screen will display: spi command byte the user may enter any valid one byte command such as 00h (nop) and then hit the enter key. the screen will then display the byte entered and the ss register contents as follows: spi byte = 00 spi return val = 83h the illustration above shows the nop command was entered. the ss register contents, 83h, indicates that the rdy, fld and lock bits are "ones" indicating that the serial port is ready for further input, that the input video signal was in field 1 at the time the status was read and that the part is operating in video lock mode. when this program is used, a modified version of the reset can only be used. it is entered as two, one-byte commands; fbh and 00h. the serout program is exited by entering a control c (^c) character. file name cmd {xxh,yyh} comments fila {c5,1f} * set xds ?ter to all fil0 {c5,00} * set xds ?ter to none. turns off xds recovery filca {c5,01} * set xds ?ter to all current class filc {c5,41} * set xds ?ter to current, in band class filfa {c5,02} * set xds ?ter to all future class filch {c5,04} * set xds ?ter to channel class film {c5,08} * set xds ?ter for misc. info filtime {c5,28} * set xds ?ter time only filvcr {c5,9e} * set xds ?ter vcr info file name cmd {xxh,yyh} comments intrd {c7,02} * set dle active intrlk {c7,08} *set dlok active intrx {c7,20} *set dxds active intrc {c7,12} * set dle & dc/t active
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 48 ds96tel0200 demonstration programs (continued) script program this program is designed to send any number of one or two-byte commands to the Z86129. the list of commands to be executed are contained in script files that have the extension .ser. the script files used with the i 2 c version, scripti, can be used with this program. the program is invoked by typing: si file_name note: file_name without the .ser extension the screen will display: eeg ccd2 serial interface script player version x.xx script file done when all the commands in the file have been successfully sent to the Z86129, the pc will return to the system prompt. the program checks the rdy status before sending each byte. if, during the entry of a command, the rdy bit is not found to be a "one", the program will report the contents of the ss register and then continue checking for rdy.
Z86129/130/131 p r e l i m i n a r y ntsc line 21 decoder ds96tel0200 49 1 packaging information figure 30. 18-lead dip package diagram figure 31. 18-lead soic package diagram
Z86129/130/131 ntsc line 21 decoder p r e l i m i n a r y 50 ds96tel0200 ordering information for fast results, contact your local zilog sales office for assistance in ordering the part desired. codes package p = plastic dip s = plastic soic temperature s = 0 c to + 70 c speed 12 = 12 mhz environmental c = plastic standard Z86129 (12 mhz ) 18-pin dip 18-pin soic Z8612912psc Z8612912ssc z8613012psc z8613012ssc z8613112psc z8613112ssc example: z 86129 12 p s c is a Z86129, 12 mhz, dip, 0 to +70 c, plastic standard flow environmental flow temperature package speed product number zilog pre?

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